Lateral castout target selection

A data processing system, comprising:

• an interconnect fabric;
• and
• a plurality of processing units coupled to the interconnect fabric, the plurality of processing units each including a respective processor core and associated upper and lower level caches, wherein the plurality of processing units includes at least first, second and third processing units;
• wherein the first processing unit, responsive to a data request, selects a victim cache line to be castout from its lower level cache, selects the lower level cache of the second processing unit as an intended destination of a lateral castout (LCO) command by randomized round-robin selection, and issues a lateral castout (LCO) command on the interconnect fabric, the LCO command identifying the victim cache line to be castout from its lower level cache and indicating that the lower level cache of the second processing unit is an intended destination of the victim cache line;
• and
• wherein responsive to a coherence response to the LCO command indicating success of the LCO command, the first processing unit removes the victim cache line from its lower level cache and the victim cache line is held in the lower level cache of one of the plurality of processing units other than the first processing unit.

A processing unit for a data processing system including a plurality of processing units coupled by an interconnect fabric, the processing unit comprising:

• a processor core and associated upper and lower level caches;
• wherein the processing unit, responsive to a data request, selects a victim cache line to be castout from its lower level cache, selects the lower level cache of a second processing unit among the plurality of processing units as an intended destination of a lateral castout (LCO) command by randomized round-robin selection, and issues a lateral castout (LCO) command on the interconnect fabric, the LCO command identifying the victim cache line to be castout from its lower level cache and indicating that the lower level cache of the second processing unit is an intended destination of the victim cache line;
• and
• wherein responsive to a coherence response to the LCO command indicating success of the LCO command, the first processing unit removes the victim cache line from its lower level cache and the victim cache line is held in the lower level cache of one of the plurality of processing units other than the first processing unit.