US 8,285,889 B2Granted

DMA transfer control device

AssigneeRenesas Electronics Corporation

InventorNaoko Shinohara

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Abstract

A DMA transfer control device comprises: a DMA arbiter that performs DMA transfer for each DMA channel formed by a combination of a memory and a plurality of input/output devices and DMA controller circuits that control the DMA arbiter; a judgment unit and a transfer time calculation unit that calculates a next DMA transfer scheduled time based on the DMA transfer size for a DMA transfer request and a judgment time. A timer counter that times the judgment time at a unit time interval, and a comparator that compares the judgment time at which a DMA transfer request arrives with the DMA transfer scheduled time are also provided, and the judgment unit sends the DMA transfer permission to the DMA arbiter when an output of the comparator indicates that the judgment time is not earlier than the DMA transfer scheduled time. The efficiency of data transfer by dynamically controlling DMA transfer is performed.

Claims3

Dependent claims

A Direct Memory Access (DMA) transfer control device, comprising:

a DMA arbiter that performs DMA transfer for each DMA channel formed by a combination of a memory and a plurality of input/output devices;
and
a DMA controller circuit that controls the DMA arbiter;
a judgment unit that sends a DMA transfer permission to said DMA arbiter in a case where a judgment time at which a DMA transfer request arrives from said input/output device is not earlier than a DMA transfer scheduled time;
a timer counter that times said judgment time at a unit time interval;
and
a comparator that compares said judgment time at which said DMA transfer request arrives with said DMA transfer scheduled time;
wherein
said judgment unit sends the DMA transfer permission to said DMA arbiter when an output of said comparator indicates that said judgment time is not earlier than said DMA transfer scheduled time and does not send the DMA transfer permission to said DMA arbiter when the output of said comparator indicates that said judgment time is earlier than said DMA transfer scheduled time;
and
a transfer time calculation unit that calculates a next round of said DMA transfer scheduled time based on a DMA transfer size for said DMA transfer request and said judgment time.

8 more elements

Dependencies are inferred from the claim text.