Signal processing apparatus and signal processing method

A signal processing apparatus, comprising:

• a test signal generation unit that generates a test signal;
• a detector that detects an envelope of an output obtained by orthogonally modulating the test signal by the orthogonal modulator;
• a comparison-decision unit that carries out comparison and decision about detection signals detected by the detector and makes decision about the detection signals;
• a control unit that derives an adjustment value from a result of the comparison and decision by the comparison-decision unit;
• an adjustment value holding unit that holds the adjustment value derived by the control unit;
• and
• a compensation value derivation unit that derives a compensation value from the adjustment value held in the adjustment value holding unit,
• the test signal generation unit generating a first test signal set including a first test signal (I1, Q1) and a second test signal (I2, Q2) that has the predetermined relationship with the first test signal and supplying the first and second test signals of the first test signal set to the orthogonal modulator,
• the detector detecting envelopes of the first and second test signals of the first test signal set modulated by the orthogonal modulator,
• the comparison-decision unit comparing a first detection signal corresponding to the first test signal of the first test signal set and a second detection signal corresponding to the second test signal of the first test signal set and making decision about the first and second detection signals, the first and second detection signals being obtained by detection of the detector,
• the control unit deriving a first adjustment value from a result of the comparison and decision by the comparison-decision unit,
• the adjustment value holding unit holding the first adjustment value,
• the test signal generation unit generating a second test signal set including first and second test signals and supplying the first and second test signals of the second test signal set to the orthogonal modulator;
• the first and second test signals of the second test signal set comprising in-phase components (I) having a predetermined relationship with in-phase components (I) of the first and second test signals of the first test signal set and quadrature components(Q) having a predetermined relationship with quadrature components (Q) of the first and second test signals of the first test signal set,
• the detector detecting an envelope of an output of the orthogonal modulator corresponding to the first test signal of the second test signal set and an envelope of an output of the orthogonal modulator corresponding to the second test signal of the second test signal set,
• the comparison-decision unit comparing a first detection signal corresponding to the first test signal of the second test signal set and a second detection signal corresponding to the second test signal of the second test signal set, the first and second detection signal being obtained by the detector,
• the control unit deriving a second adjustment value from a result of the comparison and decision by the comparison-decision unit,
• the adjustment value holding unit holding the second adjustment value,
• the adjustment value derivation unit deriving the compensation value from the first adjustment value and the second adjustment value held in the adjustment value holding unit,
• the signal processing apparatus further comprising
• an estimation unit that estimates a DC offset and an IQ mismatch of the orthogonal modulator based on the compensation value.

A signal processing method comprising:

• supplying a first test signal set and a second test signal set to an orthogonal modulator as test signals for testing the orthogonal modulator, the first test signal set including first and second test signals having a predetermined relationship the second test signal set including first and second test signals respectively having predetermined relationships with the first and second test signals of the first test signal set;
• and
• obtaining respective adjustment values from detection results of outputs of the orthogonal modulator for inputs of the first and second test signals of the first test signal set and detection results of outputs of the orthogonal modulator for inputs of the first and second test signals of the second test signal set, and deriving a compensation value for compensating for at least one of a DC offset and an IQ mismatch of the orthogonal modulator based on the adjustment values, wherein the method comprises:
• generating the first test signal set including the first test signal (I1, Q1) and the second test signal (I2, Q2) that has the predetermined relationship with the first test signal and sequentially supplying the first and second test signal of the first test signal set to the orthogonal modulator;
• detecting an envelope of an output of the orthogonal modulator corresponding to the first test signal of the first test signal set and an envelope of an output of the orthogonal modulator corresponding to the second test signal of the first test signal set;
• comparing a first detection signal corresponding to a first test signal with a second detection signal corresponding to a second test signal and making decision about the first and second detection signals, the first and second detection signals being obtained by the detection step;
• deriving a first adjustment value from a result of the comparison and decision by the comparison and decision step;
• generating a second test signal set including first and second test signals and supplying the first and second test signals of the second test signal set to the orthogonal modulator;
• the first and second test signals of the second test signal set comprising in-phase components (I) having a predetermined relationship with in-phase components (I) of the first and second test signals of the first test signal set and quadrature components (Q) having a predetermined relationship with quadrature components (Q) of the first and second test signals of the first test signal set;
• detecting an envelope of an output of the orthogonal modulator corresponding to the first test signal of the second test signal set and an envelope of an output of the orthogonal modulator corresponding to the second test signal of the second test signal set;
• comparing a first detection signal corresponding to the first test signal of the second test signal set with a second detection signal corresponding to the second test signal of the second test signal set, the first and second detection signal being obtained by the detection step;
• deriving a second adjustment value from a result of the comparison and decision by the comparison and decision step;
• deriving the compensation value from the first adjustment value and the second adjustment value;
• and
• estimating a DC offset and an IQ mismatch of the orthogonal modulator based on the compensation value.