Clock and data recovery circuits
AssigneeNational Taiwan University
InventorsJr-I Lee, Ke-Chung Wu
Life of this patent
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Abstract
A clock and data recovery (CDR) circuit is provided. The CDR circuit receives a data signal and generates a clock signal. The CDR circuit comprises an oscillator, a phase detector, and a first voltage-to-current (V-to-I) converter. The oscillator generates the clock signal according to an oscillation voltage. The phase detector receives the data signal. The phase detector comprises a mixer for detecting a phase difference between the data clock and the clock signal and generating a phase detection signal which represents the phase difference. The first V-to-I converter receives the phase detection signal and generates a first current signal according to a voltage level of the phase detection signal to vary the oscillation voltage.
Claims18
A clock and data recovery (CDR) circuit for receiving a data signal and generating a clock signal, comprising:
- an oscillator for generating the clock signal according to an oscillation voltage;
- a phase detector for receiving the data signal, wherein the phase detector comprises a mixer, the mixer configured for detecting a phase difference between the data signal and the clock signal and generating a phase detection signal which represents the phase difference between the data signal and the clock signal, wherein the phase detector delays the data signal to generate a first delayed data signal and a third delayed data signal;
- a first voltage-to-current (V-to-I) converter for receiving the phase detection signal and generating a first current signal according to a voltage level of the phase detection signal to vary the oscillation voltage;
- a frequency detector, coupled to the phase detector, for detecting a frequency difference between the data signal and the clock signal according to the clock signal, the first delayed data signal, and the third delayed data signal and generating a frequency detection signal which represents the frequency difference;
- and
- a second V-to-I converter for receiving the frequency detection signal and generating a second current signal according to a voltage of the frequency detection signal to vary the oscillation voltage.
Dependencies are inferred from the claim text.