PCR clock recovery in an IP network
AssigneeBroadcom Corporation
InventorsJeffrey Fisher, Brian Schoner, Rajesh S. Mamidwar
Life of this patent
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Abstract
An IP network includes a central entity and at least one customer premises equipment (CPE) device. The central entity generates a program clock reference (PCR) clock and provides audio-visual packets to a CPE based on the PCR clock. The CPE sets a first clock based on the PCR clock for decoding operations. The CPE sets a second clock that is independent from the first clock for audio and video output operations. For example, the CPE can process the audio-visual packets using the second clock.
Claims24
An apparatus for decoding a packet into an output signal, comprising:
- a phase-locked loop (PLL) configured to recover a decoder timebase from the packet;
- a decoder configured to decode the packet using the decoder timebase to provide one or more decoded frames;
- a clock generation module configured to generate a display timebase different from the decoder timebase;
- and
- an output module configured to output the one or more decoded frames as the output signal based on one of the decoder timebase or the display timebase depending on a data type of the packet.
A method for decoding a packet into an output signal, comprising:
- (a) recovering a decoder timebase from the packet;
- (b) decoding the packet using the decoder timebase to provide one or more decoded frames;
- (c) generating a display timebase different from the decoder timebase;
- and
- (d) outputting the one or more decoded frames as the output signal based on one of the decoder timebase or the display timebase depending on a data type of the packet.
An apparatus for decoding a packet into an output signal, comprising:
- means for recovering a decoder timebase from the packet;
- means for decoding the packet using the decoder timebase to provide one or more decoded frames;
- and
- means for generating a display timebase different from the decoder timebase;
- and
- means for outputting the one or more decoded frames as the output signal based on one of the decoder timebase or the display timebase depending on a data type of the packet.
An apparatus for decoding a packet into an output signal, comprising:
- a phase-locked loop (PLL) configured to recover a decoder timebase from the packet;
- a decoder configured to decode the packet using the decoder timebase to provide one or more decoded frames;
- and
- a clock generation module configured to generate a display timebase,
- wherein the display timebase is used to provide the output signal based upon the one or more decoded frames, and
- the display timebase is either the same as, or independent from, the decoder timebase depending on a type of information contained in the packet.
Dependencies are inferred from the claim text.