Recursive packet header processing
AssigneeBroadcom Corporation
InventorBrian Petersen
Life of this patent
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Abstract
According to one general aspect, an apparatus may include an ingress port, a header cache, and a plurality of ingress recursion engines. In some embodiments, the ingress port may be configured to receive a packet that comprises a data portion and a header portion, wherein the header portion comprises at least one header. In various embodiments, the header cache may be configured to store at least a part of the header portion of the packet. In one embodiment, the plurality of ingress recursion engines may be configured to recursively process the header portion, from outer-most header to inner-most header, until an adjacency value for the packet is determined. In some embodiments, each ingress recursion engine may be configured to process a header from the header portion.
Claims20
An apparatus comprising:
- an ingress port configured to receive a packet that comprises a data portion and a header portion, wherein the header portion comprises at least one header;
- a header cache configured to store at least a part of the header portion of the packet, but not the data portion of the packet;
- and
- a plurality of ingress recursion engines,
- wherein each ingress recursion engine is configured to process a header from the header portion, and
- wherein the plurality of ingress recursion engines, collectively, are configured to recursively process the header portion, at least partially, from outer-most header to inner-most header, until an adjacency value for the packet is determined;
- and
- wherein the recursively processing by the plurality of ingress recursion engines, collectively, comprises:
- partially examining an outer header to determine if an inner header should be processed first;
- if so, processing the inner header, returning to the outer header, processing the outer header, and skipping over the previously processed inner header to process another header.
A method comprising:
- receiving a packet that comprises a data portion and a header portion, wherein the header portion comprises at least one header;
- storing at least part of the header portion of the packet in a header cache separately from the data portion of the packet;
- recursively processing the header portion, at least partially from outer-most header to inner-most header, until an adjacency value for the packet is determined, and
- wherein recursively processing comprises:
- partially examining an outer header to determine if an inner header should be processed first,
- if so, processing the inner header, returning to the outer header, processing the outer header, and skipping over the previously processed inner header to process another header;
- and
- transmitting the packet based at least in part upon the adjacency value.
A microchip device comprising:
- at least one ingress port configured to receive a packet that comprises a data portion and a header portion, wherein the header portion comprises at least one header;
- a plurality of ingress recursion engines configured to:
- recursively process the header portion, at least partially, from outer-most header to inner-most header, until an adjacency value for the packet may be determined, wherein recursively processing comprises partially examining an outer header to determine if an inner header should be processed first, if so, processing the inner header, returning to the outer header, processing the outer header, and skipping over the previously processed inner header to process another header;
- a header cache configured to store at least a part of the header portion of the packet separately from the data portion of the packet;
- a classification engine configured to apply a set of rules to the packet based upon the results of the recursive processing by the plurality of ingress recursion engines;
- a plurality of egress recursion engines configured to:
- recursively build a new header portion, from the inner-most header to the outer-most header of the new header portion, until a header is associated with an interface identifier;
- and
- at least one egress port configured to transmit the packet to another device.
Dependencies are inferred from the claim text.