Combined EEPROM/flash non-volatile memory circuit
AssigneeNXP B.V.
InventorsSönke Ostertun, Christoph Hans Joachim Garbe, Andreas Nentwig, Nils Sandersfeld
Life of this patent
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Abstract
A non-volatile memory circuit includes memory rows and supporting circuits coupled to the memory rows, where at least one of the memory rows include at least one Electrically Erasable Programmable Read-Only Memory (EEPROM) memory element and at least one Flash memory element. The EEPROM and Flash elements are configured to share some of the supporting circuits and can be accessed in parallel.
Claims20
A non-volatile memory circuit, the non-volatile memory circuit comprising:
- memory rows, wherein at least one of the memory rows comprises at least one Electrically Erasable Programmable Read-Only Memory (EEPROM) memory element and at least one Flash memory element, and wherein the at least one EEPROM element and the at least one Flash element are configured to be accessed in parallel;
- and
- supporting circuits coupled to the memory rows, wherein some of the supporting circuits are shared by the at least one EEPROM element and the at least one Flash element of the at least one of the memory rows.
A non-volatile memory circuit, the non-volatile memory circuit comprising:
- an Electrically Erasable Programmable Read-Only Memory (EEPROM) memory matrix;
- a Flash memory matrix;
- an address bus configured to receive a memory address;
- a column decoder coupled to the address bus and configured to select at which memory column a memory element that corresponds to the memory address is located;
- and
- a row decoder coupled to the address bus and configured to select at which memory row the memory element that corresponds to the memory address is located,
- wherein at least one row of the non-volatile memory circuit comprises at least one EEPROM memory element from the EEPROM memory matrix and at least one Flash memory element from the Flash memory matrix, and wherein the at least one EEPROM memory element and the at least one Flash memory element from the Flash memory matrix are configured to be accessed in parallel.
A method for accessing data stored in a non-volatile memory circuit, the method comprising:
- selecting all Electrically Erasable Programmable Read-Only Memory (EEPROM) memory cells and all Flash memory cells in a memory row of a memory circuit;
- supplying a first voltage to the selected Flash memory cells;
- supplying a second voltage to at least some of the selected EEPROM memory cells;
- and
- accessing data stored in the selected Flash memory cells and data stored in the at least some of the selected EEPROM memory cells.
Dependencies are inferred from the claim text.