Semiconductor storage device and reading method thereof
AssigneeKabushiki Kaisha Toshiba
InventorsRieko Tanaka, Makoto Iwai
Life of this patent
Estimating the term…
Abstract
An embodiment of the invention provides a semiconductor storage device including a NAND string, a SEN node, and a capacitor. The NAND string includes plural series-connected memory cells, and one end of the NAND string is connected to a bit line while the other end is connected to a common source line. The SEN node is configured to be able to be electrically connected to a voltage source and the bit line. In the capacitor, one end is connected to the SEN node while the other end is connected to a CLK node to which a voltage within a predetermined range is applied. A discharge rate of the SEN node is enhanced by decreasing a capacitance during discharge of the SEN node only when a selected memory cell selected from the plural memory cells is an on-cell.
Claims20
A semiconductor storage device comprising:
- a NAND string that includes a plurality of series-connected memory cells, one end of the NAND string being connected to a bit line while the other end is connected to a common source line;
- a SEN node that is configured to be able to be electrically connected to a voltage source and the bit line;
- and
- a capacitor in which one end is connected to the SEN node while the other end is connected to a CLK node, to which a voltage within a predetermined range is applied, a discharge rate of the SEN node being enhanced by decreasing a capacitance during discharge of the SEN node only when a selected memory cell selected from the plurality of memory cells is an on-cell.
Dependencies are inferred from the claim text.