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US 8,284,597 B2Granted
Diode memory
AssigneeMacronix International Co., Ltd.
InventorsKuo-Pin Chang, Hang-Ting Lue
Life of this patent
Estimating the term…
Abstract
A diode memory device has an intermediate structure between the two terminals, such as a p terminal and the n terminal.
Claims20
An integrated circuit apparatus, comprising:
- a cross-point array including a plurality of bit lines and a plurality of word lines, intersections of the plurality of bit lines and the plurality of word lines including diode memory devices, the diode memory devices including:
- a diode including a first terminal electrically coupling a bit line of the plurality of bit lines and a second terminal electrically coupling a word line of the plurality of word lines;
- and
- a memory element between the first terminal and the second terminal of the diode, the memory element being bidirectionally switchable between a first memory state and a second memory state,
- wherein the diodes of the diode memory devices reduce current through unselected intersections of the intersections of the plurality of bit lines and the plurality of word lines;
- and
- control circuitry coupled to the cross-point array, the control circuitry applying bias arrangements to a selected intersection of the intersections of the plurality of bit lines and the plurality of word lines that bidirectionally switch the memory element of the diode memory device at the selected intersection.
4 more elements
A method of operating an integrated circuit, comprising:
- applying bias arrangements to a selected intersection of intersections of a plurality of bit lines and a plurality of word lines that bidirectionally switch memory states of a memory element of a diode memory device at the selected intersection, wherein the diode memory device includes a diode including a first terminal electrically coupling a bit line of the plurality of bit lines and a second terminal electrically coupling a word line of the plurality of word lines, and a memory element between the first terminal and the second terminal of the diode, and current through unselected intersections of the intersections of the plurality of bit lines and the plurality of word lines is reduced by the diode of the diode memory device at the unselected intersections.
An integrated circuit apparatus, comprising:
- a diode memory device including:
- a diode including a first terminal and a second terminal;
- and
- a memory element between the first terminal and the second terminal of the diode, the memory element being bidirectionally switchable between a first memory state and a second memory state,
- wherein the first terminal is in a well having a first doping type at a first concentration, a doping region having the first doping type in the well and having a second concentration less than the first concentration.
- control circuitry coupled to the diode memory device, the control circuitry applying bias arrangements to the diode memory device that bidirectionally switch the memory element of the diode memory device.
3 more elements
Dependencies are inferred from the claim text.