Magnetic random access memory and operating method of the same

A magnetic random access memory comprising:

• first and second bit lines configured to be provided to extend in a first direction;
• a storage block configured to include at least one magnetroresistive element for storing data;
• and
• a reading circuit,
• wherein said reading circuit includes a first terminal electrically connected to said first bit line and a second terminal electrically connected to said second bit line,
• wherein said second terminal has a high impedance to prevent a steady-state current from flowing into at a time of a reading operation,
• wherein said reading circuit supplies a constant reading current from said first terminal to said first bit line at the time of said reading operation,
• wherein said storage block is configured such that said reading current flows from said first bit line to said magnetroresistive element and said magnetroresistive element is connected to said second bit line at the time of said reading operation, and
• wherein said reading circuit determines said data on the basis of a voltage supplied to said second terminal through said second bit line.

An operating method of a magnetic random access memory, said magnetic random access memory includes:

• first and second bit lines configured to be provided to extend in a first direction,
• a magnetroresistive element configure to store data, and
• a reading circuit,
• wherein said reading circuit includes a first terminal and a second terminal,
• wherein said second terminal has a high impedance that prevents a steady-state current from flowing into at a time of a reading operation,
• said operating method comprising:
• supplying a reading current from said first terminal through said first bit line to said magnetroresistive element by said reading circuit;
• electrically connecting one end of said magnetroresistive element to said second bit line;
• and
• controlling said reading current on the basis of a voltage applied to said second terminal through said second bit line by said reading circuit.