Electrostatic discharge (ESD) protection circuit and related apparatus and method

An apparatus comprising:

• integrated circuitry to be protected;
• an input/output pad in electrical connection with the integrated circuitry;
• and
• an electrostatic discharge (ESD) protection circuit coupled to the integrated circuitry and the input/output pad, wherein the ESD protection circuit comprises:
• a control circuit configured to generate a signal indicating whether an input voltage on the input/output pad is excessive;
• a voltage divider configured to receive the signal from the control circuit and to divide the input voltage to generate a divided voltage;
• an inverter chain comprising multiple inverters, a first inverter configured to receive the divided voltage, at least two inverters configured to generate transistor control signals;
• and
• a plurality of transistors configured to receive the transistor control signals and, when the input voltage is excessive, to protect the integrated circuitry from the excessive input voltage;
• and
• wherein the control circuit comprises:
• first and second transistors coupled in series;
• and
• third and fourth transistors coupled in series;
• wherein a gate of the first transistor is coupled to receive a voltage generated between the third and fourth transistors;
• wherein gates of the third and fourth transistors are coupled to receive a voltage generated between the first and second transistors;
• and
• wherein a gate of the second transistor is configured to receive a supply voltage.