Display device and repairing method therefor

A display device comprising:

• a plurality of gate lines;
• a first gate driving circuit comprising a plurality of cascade-connected stages, the stages of the first gate driving circuit being arranged at a first side of the gate lines and respectively electrically coupled to first terminals of the gate lines;
• and
• a second gate driving circuit comprising a plurality of cascade-connected stages, the stages of the second gate driving circuit being arranged at a second side of the gate lines and respectively electrically coupled to second terminals of the gate lines;
• wherein each of the stages of the first and second gate driving circuits comprises a first input terminal, a second input terminal, a clock pulse input terminal, an output terminal and at least one repair signal input terminal, the output terminal is for supplying a gate driving signal to enable one of the gate lines, the at least one repair signal input terminal is adapted to receive at least one repair signal, and the stage is inoperative when the at least one repair signal input terminal is electrically coupled with the at least one repair signal;
• wherein the first input terminal of a front stage of two neighboring stages of the same gate driving circuit is electrically coupled to receive a start pulse, the second input terminal of the front stage is electrically coupled to the output terminal of a rear stage of the two neighboring stages, the clock pulse input terminal of the front stage is electrically coupled to receive a first clock pulse signal, the first input terminal of the rear stage is electrically coupled to the output terminal of the front stage, and the clock pulse input terminal of the rear stage is electrically coupled to receive a second clock pulse signal having an inverted phase with respect to the first clock pulse signal.

A display device comprising:

• a plurality of gate lines;
• a first gate driving circuit comprising a plurality of cascade-connected stages, the stages of the first gate driving circuit being arranged at a first side of the gate lines and respectively electrically coupled to first terminals of the gate lines;
• and
• a second gate driving circuit comprising a plurality of cascade-connected stages, the stages of the second gate driving circuit being arranged at a second side of the gate lines and respectively electrically coupled to second terminals of the gate lines;
• wherein each of the stages of the first and second gate driving circuits comprises:
• a first transistor, the first source/drain electrode of the first transistor being electrically coupled to a corresponding one of the gate lines and acts an output terminal of the stage, and the second source/drain electrode of the first transistor being electrically coupled to receive a clock pulse signal;
• and
• a repair circuit including a first terminal, a second terminal and at least one control terminal, the first terminal of the repair circuit being electrically coupled to the gate electrode of the first transistor, and the second terminal of the repair circuit being electrically coupled to a predetermined potential;
• wherein the at least one control terminal of the repair circuit of each of the stages of the first gate driving circuit is electrically coupled to receive at least one repair signal, the at least one repair signal enables the repair circuit to pull a potential on the gate electrode of the first transistor of the stage to the predetermined potential and thereby the first transistor maintains at off-state, the at least one control terminal of the repair circuit of each of the stages of the second gate driving circuit is electrically disconnected with the at least one repair signal.