Output buffering circuit, amplifier device, and display device with reduced power consumption
AssigneeHimax Technologies Limited
InventorsChin-Tien Chang, Ching-Chung Lee
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Abstract
An output buffering circuit of a driver device for a display includes a first amplifier circuit having a first input stage, coupled between an upper power supply and a lower power supply, and a first output stage, coupled between the upper power supply and a first intermediate power supply that is greater than the lower power supply, and a second amplifier circuit having a second input stage coupled between the upper power supply and the lower power supply, and a second output stage coupled between a second intermediate power supply that is lower than the upper power supply and the lower power supply.
Claims20
An output buffering circuit of a driver device for a display, comprising:
- a first amplifier circuit including:
- a first input stage coupled between an upper power supply and a lower power supply;
- and
- a first output stage connected with the first input stage and coupled between the upper power supply and a first intermediate power supply that is greater than the lower power supply, wherein the first output stage comprises:
- an output node providing a first output signal;
- and
- a discharging path from the output node to the first intermediate power supply;
- and
- a second amplifier circuit including:
- a second input stage coupled between the upper power supply and the lower power supply;
- and
- a second output stage connected with the second input stage and coupled between the lower power supply and a second intermediate power supply that is lower than the upper power supply.
A display device comprising:
- a display panel having a plurality of source lines;
- and
- a source driver having an output buffering circuit, the output buffering circuit including:
- a first amplifier circuit having:
- a first input stage coupled between an upper power supply and a lower power supply;
- and
- a first output stage connected with the first input stage and coupled between the upper power supply and a first intermediate power supply that is greater than the lower power supply, wherein the first output stage comprises:
- a first output node;
- and
- a discharging path from the first output node to the first intermediate power supply;
- and
- a second amplifier circuit having:
- a second input stage coupled between the upper power supply and the lower power supply;
- and
- a second output stage connected with the second input stage and coupled between the lower power supply and a second intermediate power supply that is lower than the upper power supply, wherein the second output stage comprises:
- a second output node;
- and
- a charging path from the second intermediate power supply to the second output node.
An output buffering circuit of a driver device for a display, comprising:
- a first amplifier circuit including:
- a first input stage coupled between an upper power supply and a lower power supply;
- and
- a first output stage connected with the first input stage and coupled between the upper power supply and a first intermediate power supply that is greater than the lower power supply;
- and
- a second amplifier circuit including:
- a second input stage coupled between the upper power supply and the lower power supply;
- and
- a second output stage connected with the second input stage and coupled between the lower power supply and a second intermediate power supply that is lower than the upper power supply, wherein the second output stage comprises:
- an output node;
- and
- a charging path from the second intermediate power supply to the output node.
Dependencies are inferred from the claim text.