US 8,284,182 B2Granted

Inverter circuit and display device

AssigneeSony Corporation

InventorsTetsuro Yamamoto, Katsuhide Uchino

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Abstract

An inverter circuit includes: first and second transistors connected between first and second voltage lines; a fifth transistor having a drain connected to a fifth voltage line and a source connected to a gate of the second transistor; a first capacitive element between a gate and the source of the fifth transistor; a second capacitive element between a first input terminal and the source of the fifth transistor; and the third capacitive element between a second input terminal and the source of the fifth transistor. A first pulse signal into the first input terminal has a phase advanced more than a second pulse signal into the second input terminal. The second pulse signal is switched while the gate of the fifth transistor and the first voltage line are connected. The first pulse signal is switched while the gate of the fifth transistor and the first voltage line are unconnected.

Claims18

Dependent claims

An inverter circuit comprising:

a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a sixth transistor each having channels of same conduction type;
a first capacitive element, a second capacitive element and a third capacitive element;
and
a first input terminal, a second input terminal and an output terminal,
wherein the first transistor makes or breaks electric connection between the output terminal and a first voltage line in response to a potential difference between a voltage of the first input terminal and a voltage of the first voltage line or a potential difference corresponding thereto,
the second transistor makes or breaks electric connection between a second voltage line and the output terminal in response to a potential difference between a voltage of a first terminal and a voltage of the output terminal or a potential difference corresponding thereto, the first terminal being a source or a drain of the fifth transistor,
the third transistor makes or breaks electric connection between a gate of the fifth transistor and the third voltage line in response to a potential difference between the voltage of the first input terminal and a voltage of a third voltage line or a potential difference corresponding thereto,
the fourth transistor makes or breaks electric connection between the first terminal and the fourth voltage line in response to a potential difference between a voltage of the second input terminal and a voltage of a fourth voltage line or a potential difference corresponding thereto,
the fifth transistor makes or breaks electric connection between a fifth voltage line and the first terminal in response to a voltage between terminals of the first capacitive element or a voltage corresponding thereto,
the sixth transistor makes or breaks electric connection between the gate of the fifth transistor and the sixth voltage line in response to a potential difference between the voltage of the second input terminal and a voltage of a sixth voltage line or a potential difference corresponding thereto,
the first and second capacitive elements are connected in series between the first input terminal and the gate of the fifth transistor,
an electrical connection point between the first and second capacitive elements is electrically connected to the first terminal, and
the third capacitive element is connected between the first terminal and a gate of the fourth transistor.

10 more elements

An inverter circuit comprising:

a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a sixth transistor each having channels of same conduction type;
a first capacitive element, a second capacitive element and a third capacitive element;
and
a first input terminal, a second input terminal and an output terminal,
wherein a gate of the first transistor is electrically connected to the first input terminal, one terminal of a drain and a source of the first transistor is electrically connected to a first voltage line, and the other terminal of the first transistor is electrically connected to the output terminal,
one terminal of a drain and a source of the second transistor is electrically connected to a second voltage line, and the other terminal of the second transistor is electrically connected to the output terminal,
a gate of the third transistor is electrically connected to the first input terminal, one terminal of a drain and a source of the third transistor is electrically connected to a third voltage line, and the other terminal of the third transistor is electrically connected to a gate of the fifth transistor,
a gate of the fourth transistor is electrically connected to the second input terminal, one terminal of a drain and a source of the fourth transistor is electrically connected to a fourth voltage line, and the other terminal of the fourth transistor is electrically connected to a gate of the second transistor,
one terminal of a drain and a source of the fifth transistor is electrically connected to a fifth voltage line, and the other terminal of the fifth transistor is electrically connected to the gate of the second transistor,
a gate of the sixth transistor is electrically connected to the second input terminal, one terminal of a drain and a source of the sixth transistor is electrically connected to a sixth voltage line, and the other terminal of the sixth transistor is electrically connected to the gate of the fifth transistor,
the first and second capacitive elements are connected in series between the first input terminal and the gate of the fifth transistor,
an electrical connection point between the first and second capacitive elements is electrically connected to the gate of the second transistor, and
the third capacitive element is connected between the gate of the second transistor and the gate of the fourth transistor.

10 more elements

An inverter circuit comprising:

a first transistor, a second transistor, a third transistor and a fourth transistor each having channels of same conduction type;
a first capacitive element, a second capacitive element and a third capacitive element;
and
a first input terminal, a second input terminal and an output terminal,
wherein a gate of the first transistor is electrically connected to the second input terminal, one terminal of a drain and a source of the first transistor is electrically connected to a first voltage line, and the other terminal of the first transistor is electrically connected to the output terminal,
one terminal of a drain and a source of the second transistor is electrically connected to a second voltage line, and the other terminal of the second transistor is electrically connected to the output terminal,
a gate of the third transistor is electrically connected to the first input terminal, one terminal of a drain and a source of the third transistor is electrically connected to a third voltage line, and the other terminal of the third transistor is electrically connected to a gate of the second transistor,
a gate of the fourth transistor is electrically connected to the second input terminal, one terminal of a drain and a source of the fourth transistor is electrically connected to a fourth voltage line, and the other terminal of the fourth transistor is electrically connected to the gate of the second transistor,
the first and second capacitive elements are connected in series between the first input terminal and the gate of the second transistor,
an electrical connection point between the first and second capacitive elements is electrically connected to the output terminal, and
the third capacitive element is connected between the second input terminal and the output terminal.

8 more elements

A display device comprising:

a display section that includes a plurality of scanning lines arranged in rows, a plurality of signal lines arranged in columns and a plurality of pixels arranged in rows and columns;
and
a drive section that drives each of the pixels,
wherein the drive section includes a plurality of inverter circuits each provided for each of the scanning lines,
each of the inverter circuits includes
a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a sixth transistor each having channels of same conduction type;
a first capacitive element, a second capacitive element and a third capacitive element;
and
a first input terminal, a second input terminal and an output terminal,
the first transistor makes or breaks electric connection between the output terminal and a first voltage line in response to a potential difference between a voltage of the first input terminal and a voltage of the first voltage line or a potential difference corresponding thereto,
the second transistor makes or breaks electric connection between a second voltage line and the output terminal in response to a potential difference between a voltage of a first terminal and a voltage of the output terminal or a potential difference corresponding thereto, the first terminal being a source or a drain of the fifth transistor,
the third transistor makes or breaks electric connection between a gate of the fifth transistor and the third voltage line in response to a potential difference between the voltage of the first input terminal and a voltage of a third voltage line or a potential difference corresponding thereto,
the fourth transistor makes or breaks electric connection between the first terminal and the fourth voltage line in response to a potential difference between a voltage of the second input terminal and a voltage of a fourth voltage line or a potential difference corresponding thereto,
the fifth transistor makes or breaks electric connection between a fifth voltage line and the first terminal in response to a voltage between terminals of the first capacitive element or a voltage corresponding thereto,
the sixth transistor makes or breaks electric connection between the gate of the fifth transistor and the sixth voltage line in response to a potential difference between the voltage of the second input terminal and a voltage of a sixth voltage line or a potential difference corresponding thereto,
the first and second capacitive elements are connected in series between the first input terminal and the gate of the fifth transistor,
an electrical connection point between the first and second capacitive elements is electrically connected to the first terminal, and
the third capacitive element is connected between the first terminal and a gate of the fourth transistor.

15 more elements

A display device comprising:

a display section that includes a plurality of scanning lines arranged in rows, a plurality of signal lines arranged in columns and a plurality of pixels arranged in rows and columns;
and
a drive section that drives each of the pixels,
wherein the drive section includes a plurality of inverter circuits each provided for each of the scanning lines,
each of the inverter circuits includes
a first transistor, a second transistor, a third transistor and a fourth transistor each having channels of same conduction type;
a first capacitive element, a second capacitive element and a third capacitive element;
and
a first input terminal, a second input terminal and an output terminal,
the first transistor makes or breaks electric connection between the output terminal and the first voltage line in response to a potential difference between a voltage of the second input terminal and a voltage of a first voltage line or a potential difference corresponding thereto,
the second transistor makes or breaks electric connection between a second voltage line and the output terminal in response to a potential difference between a gate voltage of the second transistor and a voltage of the output terminal or a potential difference corresponding thereto,
the third transistor makes or breaks electric connection between a gate of the second transistor and the third voltage line in response to a potential difference between a voltage of the first input terminal and a voltage of a third voltage line or a potential difference corresponding thereto,
the fourth transistor makes or breaks electric connection between the gate of the second transistor and the fourth voltage line in response to a potential difference between the voltage of the second input terminal and a voltage of a fourth voltage line or a potential difference corresponding thereto,
the first and second capacitive elements are connected in series between the first input terminal and the gate of the second transistor,
an electrical connection point between the first and second capacitive elements is electrically connected to the output terminal, and
the third capacitive element is connected between the second input terminal and the output terminal.

13 more elements

Dependencies are inferred from the claim text.

Facts

Application: 13/064,110Filed 7 Mar 2011
Priority: JP 2010-0855111 Apr 2010
Published: US 2011/0242079 A16 Oct 2011
Granted: 9 Oct 2012
Term ends: Not estimatedThe source records don’t support an estimate.

Classification6 codes

G09G 3/3266
Organic, e.g. using organic light-emitting diodes [OLED]: details of drivers for scan electrodes
G11C 19/184
In combination with semiconductor elements, e.g. bipolar transistors, diodes: with field-effect transistors, e.g. MOS-FET
G11C 19/28
Digital stores in which the information is moved stepwise, e.g. shift registers: using semiconductor elements
G09G 2320/045
Preventing or counteracting the effects of ageing: compensation of drifts in the characteristics of light emitting or modulating elements