US 8,284,149 B2Granted

Gate driving circuit and display device having the gate driving circuit

AssigneeSamsung Electronics Co., Ltd.

InventorsSoo-Wan Yoon, Joon-Chul Goh, Chong-Chul Chai, Young-Soo Yoon, Sei-Hyoung Jo

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Abstract

An output part outputs a high voltage of a first clock signal as a high voltage of an (m)-th gate signal (‘m’ is a natural number) and a low voltage in response to a high signal of an (m+1)-th gate signal outputted from an (m+1)-th stage. A first maintenance part maintains a control part of the pull-up part at a low voltage in response to an (m−1)-th node signal or an (m+1)-th node signal lower than a high signal of a second clock signal having a phase opposite to the phase of the first clock signal received from an (m−1)-th stage or the (m+1)-th stage. A second maintenance part maintains the low voltage of the (m)-th gate signal in response to the (m−1)-th node signal or the (m+1)-th node signal.

Claims24

Dependent claims

A gate driving circuit including a plurality of stages connected to each other, the plurality of stages having a first stage in which a start signal is coupled to an input terminal, the gate driving circuit sequentially outputting output signals of respective stages,

an (m)-th stage (‘m’ is a natural number) of the plurality of stages comprising:
an output part outputting a high voltage of a first clock signal as a high voltage of an (m)-th gate signal and a low voltage in response to a high voltage of an (m+1)-th gate signal outputted from an (m+1)-th stage;
a first maintenance part maintaining a control part of a pull-up part at a low voltage in response to an (m−1)-th node signal or an (m+1)-th node signal lower than a high voltage of a second clock signal having a phase opposite to a phase of the first clock signal received from an (m−1)-th stage or the (m+1)-th stage;
and
a second maintenance part maintaining an output node of the output part at -the low voltage of the (m)-th gate signal in response to the (m−1)-th node signal or the (m+1)-th node signal,
wherein the control parts of the first and second maintenance parts are gate electrodes and the two gate electrodes are directly connected.

3 more elements

A display device comprising:

a display panel including a display area displaying an image, the display area including gate lines and source lines, and a peripheral area surrounding the display area;
a source driving circuit outputting data signals to the source lines;
and
a gate driving circuit integrated in the peripheral area and including a plurality of stages outputting gate signals to the gate lines,
an (m)-th stage (‘m’ is a natural number) of the plurality of stages comprising:
an output part outputting a high voltage of a first clock signal as a high voltage of an (m)-th gate signal and a low voltage in response to a high voltage of an (m+1)-th gate signal outputted from an (m+1)-th stage;
a first maintenance part maintaining a control part of a pull-up part at the low voltage in response to an (m−1)-th node signal or an (m+1)-th node signal lower than a high voltage of a second clock signal having a phase opposite to a phase of the first clock signal received from an (m−1)-th stage or the (m+1)-th stage;
and
a second maintenance part maintaining the low voltage of the (m)-th gate signal in response to the (m−1)-th node signal or the (m+1)-th node signal,
wherein the control parts of the first and second maintenance parts are gate electrodes and the two gate electrodes are directly connected.

7 more elements

an (m)-th stage (‘m’ is a natural number) of the plurality of stages comprising:
an output part outputting a high voltage of a first clock signal as a high voltage of an (m)-th gate signal and a low voltage in response to a high voltage of an (m+1)-th gate signal outputted from an (m+1)-th stage;
a first maintenance part maintaining a control part of a pull-up part at a low voltage in response to an (m−1)-th node signal or an (m+1)-th node signal lower than a high voltage of a second clock signal having a phase opposite to a phase of the first clock signal received from an (m−1)-th stage or the (m+1)-th stage;
and
a second maintenance part maintaining an output node of the output part at the low voltage of the (m)-th gate signal in response to the (m−1)-th node signal or the (m+1)-th node signal,
wherein the (m)-th stage further comprises:
a third maintenance part maintaining the control part of the pull-up part at the low voltage in response to an (m)-th node signal lower than the high voltage of the first clock signal;
and
a fourth maintenance part maintaining the low voltage of the (m)-th gate signal in response to the (m)-th node signal.

6 more elements

A display device comprising:

a display panel including a display area displaying an image, the display area including gate lines and source lines, and a peripheral area surrounding the display area;
a source driving circuit outputting data signals to the source lines;
and
a gate driving circuit integrated in the peripheral area and including a plurality of stages outputting gate signals to the gate lines,
an (m)-th stage (‘m’ is a natural number) of the plurality of stages comprising:
an output part outputting a high voltage of a first clock signal as a high voltage of an (m)-th gate signal and a low voltage in response to a high voltage of an (m+1)-th gate signal outputted from an (m+1)-th stage;
a first maintenance part maintaining a control part of a pull-up part at the low voltage in response to an (m−1)-th node signal or an (m+1)-th node signal lower than a high voltage of a second clock signal having a phase opposite to a phase of the first clock signal received from an (m−1)-th stage or the (m+1)-th stage;
and
a second maintenance part maintaining the low voltage of the (m)-th gate signal in response to the (m−1)-th node signal or the (m+1)-th node signal,
wherein the (m)-th stage further comprises:
a third maintenance part maintaining the control part of the pull-up part at the low voltage in response to an (m)-th node signal lower than the high voltage of the clock signal;
and
a fourth maintenance part maintaining the low voltage of the (m)-th gate signal in response to the (m)-th node signal.

10 more elements

Dependencies are inferred from the claim text.