Matrix addressing method and circuitry and display device using the same

A matrix addressing circuit for driving pixels arranged across a display area by signals supplied to row electrodes and column electrodes arranged to be mutually crossed, comprising:

• a rich-gray-scale generating unit generating rich-gray-scale pixel information signals in a predetermined number of levels of gray scale in accordance with original pixel information signals;
• a poor-gray-scale generating unit generating poor-gray-scale pixel information signals in a smaller number of levels of gray scale than the predetermined number of levels of gray scale in accordance with original pixel information signals;
• a mixing control unit discretely mixing rich-gray-scale pixels driven by the rich-gray-scale pixel information signals and poor-gray-scale pixels driven by the poor-gray-scale pixel information signals to coexist in at least a part of the display area in a predetermined mixing pattern to display the same image object in a predetermined mode,
• wherein the rich-gray-scale generating unit comprises a gray-scale voltage generating circuit with amplifiers respectively receiving a plurality of gray-scale voltages having gradually level-shifted values, and a selecting circuit that selects any of outputs of the amplifiers for each pixel or each predetermined display unit in accordance with a pixel information signal indicating a level of gray scale of the pixel or the display unit and outputs it as the rich-gray-scale pixel information signals, and the poor-gray-scale generating unit comprises a switch circuit which disconnects power supply to all the amplifiers or connects power supply only to a predetermined number of amplifiers corresponding to predetermined gray scale levels among the all amplifiers while disconnecting power supply to the other amplifiers in the predetermined mode, and a setting circuit setting the selecting circuit in a condition to select either of a power supply voltage and a ground voltage and/or any of output signals of the amplifiers given the power supply in accordance with a selection control signal responsive to the original pixel information signal in the predetermined mode to output the selected one as the poor-gray-scale pixel information signal, and
• wherein the poor-gray-scale generating unit comprises a signal processing circuit that performs dithering processing on the original pixel information signal, an output of the signal processing circuit being used as the selection control signal in the predetermined mode;
• and
• a buffer amplifier or a switch supplied with an output signal of the selecting circuit, wherein, in the predetermined mode, the buffer amplifier or switch is controlled to output the poor-gray-scale pixel information signal during a prescribed frame of a sequence consisting of a plurality of frames and to break the output of the poor-gray-scale pixel information signal in at least one remainder frame of the sequence.

A display device using a matrix addressing circuit for driving pixels arranged across a display area by signals supplied to row electrodes and column electrodes arranged to be mutually crossed, the matrix addressing circuit comprising:

• rich-gray-scale generating unit generating rich-gray-scale pixel information signals in a predetermined number of levels of gray scale in accordance with original pixel information signals;
• poor-gray-scale generating unit generating poor-gray-scale pixel information signals in a smaller number of levels of gray scale than the predetermined number of levels of gray scale in accordance with original pixel information signals;
• and
• mixing control unit coupled to the rich-gray-scale generating unit and the poor-gray-scale generating unit discretely mixing rich-gray-scale pixels driven by the rich-gray-scale pixel information signals and poor-gray-scale pixels driven by the poor-gray-scale pixel information signals to coexist in at least a part of the display area in a predetermined mixing pattern to display the same image object in a predetermined mode,
• wherein the rich-gray-scale generating unit comprises a gray-scale voltage generating circuit with amplifiers respectively receiving a plurality of gray-scale voltages having gradually level-shifted values, and a selecting circuit that selects any of outputs of the amplifiers for each pixel or each predetermined display unit in accordance with a pixel information signal indicating a level of gray scale of the pixel or the display unit and outputs it as the rich-gray-scale pixel information signals, and the poor-gray-scale generating unit comprises a switch circuit which disconnects power supply to all the amplifiers or connects power supply only to a predetermined number of amplifiers corresponding to predetermined gray scale levels among the all amplifiers while disconnecting power supply to the other amplifiers in the predetermined mode, and a setting circuit coupled to the selecting circuit setting the selecting circuit in a condition to select either of a power supply voltage and a ground voltage and/or any of output signals of the amplifiers given the power supply in accordance with a selection control signal responsive to the original pixel information signal in the predetermined mode to output the selected one as the poor-gray-scale pixel information signal, and
• wherein the poor-gray-scale generating unit comprises a signal processing circuit that performs dithering processing on the original pixel information signal, an output of the signal processing circuit being used as the selection control signal in the predetermined mode;
• and
• a buffer amplifier or a switch coupled to the selecting circuit and supplied with an output signal of the selecting circuit, wherein, in the predetermined mode, the buffer amplifier or switch is controlled to output the poor-gray-scale pixel information signal during a prescribed frame of a sequence consisting of a plurality of frames and to break the output of the poor-gray-scale pixel information signal in at least one remainder frame of the sequence.