Cyclic digital-to-analog converter (DAC) with capacitor swapping

A cyclic digital-to-analog converter, comprising:

• a first capacitor;
• a second capacitor;
• switching circuitry selectively configurable to connect the first and second capacitors in at least two modes of operation, wherein a first mode uses the first capacitor during conversion of a bit as a sampling capacitor and uses the second capacitor during conversion of that bit as a holding capacitor, and wherein a second mode uses the second capacitor during conversion of a bit as a sampling capacitor and uses the first capacitor during conversion of that bit as a holding capacitor;
• and
• a controller adapted to swap from configuration in the first mode to configuration in the second mode for bit conversion when adjacent bits of a digital word to be converted have different logical values.

A method for controlling configuration of a first capacitor and a second capacitor for use in a cyclical digital-to-analog conversion of a digital word to be converted, comprising:

• configuring the first and second capacitors in a first mode using the first capacitor as a sampling capacitor and the second capacitor as a holding capacitor;
• converting one bit of the digital word using the first and second capacitors configured in the first mode;
• determining whether the one bit and another bit of the digital word which is adjacent the one bit have different logical values;
• if so, configuring the first and second capacitors in a second mode using the second capacitor as the sampling capacitor and the first capacitor as the holding capacitor;
• and
• then converting the another, adjacent, bit of the digital word using the first and second capacitors configured in the second mode.