Digital to-analog converter
AssigneeMitsubishi Electric Corporation
InventorsKohei Teramoto, Tsuyoshi Nakada, Seiki Suzuki, Takahisa Aoyagi, Jun Yoshida, Ryoichi Hamahashi
Life of this patent
Estimating the term…
Loading patent…
AssigneeMitsubishi Electric Corporation
InventorsKohei Teramoto, Tsuyoshi Nakada, Seiki Suzuki, Takahisa Aoyagi, Jun Yoshida, Ryoichi Hamahashi
Estimating the term…
A complementary pulse width modulation circuit is composed of a signal generating circuit 10 for generating first and second pulse width modulation signals (PWM#1 and PWM#2) that are complementary to each other from an input signal (IN) in response to a sampling synchronous signal (Sample) generated in synchronization with a clock (CLK); and a signal output circuit 20 for combining a positive signal and a negative signal of the first pulse width modulation signal (PWM#1) generated by the signal generating circuit, and for combining the first pulse width modulation signal (PWM#1) combined with the second pulse width modulation signal (PWM#2), followed by outputting.
A digital-to-analog converter comprising:
Dependencies are inferred from the claim text.