Delay lines, amplifier systems, transconductance compensating systems and methods of compensating

A transconductance compensating system, comprising:

• a bias voltage generator having first and second input transistors having respective sources coupled to each other, respective drains coupled to a first supply voltage node through respective loads, and respective gates, the gate of the first input transistor being coupled to the drain of the second input transistor and the first output node of the bias voltage generator, and the gate of the second input transistor being coupled to the drain of the first input transistor and the second output node of the bias voltage generator, the bias voltage generator configured to provide first and second differential output signals at respective first and second differential output nodes;
• a differential-to-single converter having first and second input nodes coupled to the first and second differential output nodes of the bias voltage generator, respectively, the differential-to-single converter configured to provide an output signal at an output node having a magnitude corresponding to the difference in the magnitude of the first and second differential output signals received from the bias voltage generator;
• and
• a comparison circuit coupled to the output node of the differential-to-single converter and to a reference voltage node and being configured to compare the magnitude of the output signal from the differential-to-single converter to the magnitude of a reference voltage provided to the reference voltage node and to provide at an output node a compensating signal corresponding to the comparison;
• and
• wherein the bias voltage generator further comprises a current sink transistor having a drain coupled to the sources of the first and second input transistors, a source coupled to a second supply voltage node, and a gate coupled to the output node of the comparison circuit.