Capacitor nonlinearity correction
AssigneeTexas Instruments Incorporated
InventorNeeraj Shrivastava
Life of this patent
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Abstract
A sample-and-hold (S/H) circuit is provided. The S/H circuit generally comprises a sampling switch, a sampling capacitor, and a correction network. The sampling switch that receives an analog input signal is actuated and deactuated by a timing signal. The sampling capacitor is coupled to the sampling switch at a sampling node so as to receive the analog input signal when the sampling switch is actuated and to store a voltage of the analog input signal when the sampling switch is deactuated. The correction network has at least one row of varactor cells such that each varactor cell is coupled to the sampling node and wherein each varactor cell in the row receives a reference voltage. Additionally, each varactor cell receives at least one of a plurality of control signals.
Claims13
An apparatus comprising:
- a sampling switch that receives an analog input signal and that is actuated and deactuated by a timing signal;
- a sampling capacitor that is coupled to the sampling switch at a sampling node, wherein the sampling capacitor receives the analog input signal when the sampling switch is actuated, and wherein the sampling capacitor stores a voltage of the analog input signal when the sampling switch is deactuated;
- and
- a correction network having a plurality of varactor cells arranged in a plurality of rows and columns, wherein:
- each varactor cell is coupled to the sampling node;
- each varactor cell within each row receives at least one of a plurality of reference voltages;
- and
- each varactor cell within each column receives at least one of a plurality of control signals.
An apparatus comprising:
- a sampling switch that receives an analog input signal and that is actuated and deactuated by a timing signal;
- a boost circuit that is coupled to the control electrode of the sampling switch and that provides the timing signal to the sampling switch;
- a sampling capacitor that is coupled to the sampling switch at a sampling node, wherein the sampling capacitor receives the analog input signal when the sampling switch is actuated, and wherein the sampling capacitor stores a voltage of the analog input signal when the sampling switch is deactuated;
- and
- a correction network having a plurality of varactor cells arranged in a first row, a second row, a first column, and a second column, wherein:
- each varactor cell is coupled to the sampling node;
- each varactor cell within the first row receives a first reference voltage;
- each varactor cell within the first row receives a second reference voltage;
- each varactor cell within the first column receives a first control signal that is adapted to actuate each varactor cell of the first column;
- and
- each varactor cell within the second column receives a second control signal that is adapted to actuate each varactor cell of the first column.
Dependencies are inferred from the claim text.