Semiconductor chip and stacked semiconductor package having the same
AssigneeHynix Semiconductor Inc.
InventorJong Hoon Kim
Life of this patent
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Abstract
A semiconductor chip and a stacked semiconductor package are presented. The semiconductor chip includes a semiconductor substrate, circuit patterns, first input/output pads and second input/output pads. The semiconductor substrate is divided into cell and peripheral regions and has first and second surfaces which oppose each other. The circuit patterns are formed on the first surface of the semiconductor substrate and are connected with the cell region and the peripheral region. The first input/output pads are formed in the cell region and are connected to the circuit patterns. The second input/output pads are formed in the peripheral region and connected with the circuit patterns.
Claims11
A semiconductor chip comprising:
- a semiconductor substrate divided into cell and peripheral regions and having first and second surfaces that oppose each other;
- circuit patterns on the first surface and connected with the cell and peripheral regions;
- first input/output pads formed in the cell region over the second surface of the semiconductor substrate and connected to the circuit patterns;
- through wiring lines in the cell region which pass through the first and second surfaces, and which electrically connect the circuit patterns to the first input/output pads;
- and
- second input/output pads formed in the peripheral region over the first surface of the semiconductor substrate and connected with the circuit patterns.
A stacked semiconductor package comprising:
- a plurality of semiconductor chips stacked upon one another, and each semiconductor chip including:
- a semiconductor substrate divided into cell and peripheral regions and having first and second surfaces which oppose each other;
- circuit patterns on the first surface and connected with the cell and peripheral regions;
- first input/output pads formed in the cell region over the second surface of the semiconductor substrate connected to the circuit patterns;
- second input/output pads formed in the peripheral region over the first surface of the semiconductor substrate and connected to the circuit patterns;
- through wiring lines in the cell region which pass through the first and second surfaces and which electrically connect the circuit patterns to the first input/output pads;
- and
- through electrodes, that pass through the first and second surfaces, in the peripheral region, and which are electrically connected to the second input/output pads,
- wherein the plurality of semiconductor chips are stacked upon each other such that the second input/output pads of upwardly positioned semiconductor chips and the through electrodes of downwardly positioned semiconductor chips are electrically connected together.
Dependencies are inferred from the claim text.