Multi-threshold voltage device and method of making same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChung-Yu Chiang, Da-Wen Lin, Shyh-Wei Wang
Life of this patent
Estimating the term…
Abstract
An integrated circuit device and method for manufacturing the integrated circuit device are disclosed. An exemplary method includes providing a substrate; forming a first gate over the substrate for a first device having a first threshold voltage characteristic, the first gate including a first material having a first-type work function; forming a second gate over the substrate for a second device having a second threshold voltage characteristic that is greater than the first threshold voltage characteristic, the second gate including a second material having a second-type work function that is opposite the first-type work function; and configuring the first device and the second device as a same channel type device.
Claims20
A method comprising:
- providing a substrate;
- forming a first gate over the substrate for a first device having a first threshold voltage characteristic, the first gate including a first metal material having a first-type work function;
- forming a second gate over the substrate for a second device having a second threshold voltage characteristic that is greater than the first threshold voltage characteristic, the second gate including a second metal material having a second-type work function that is opposite the first-type work function;
- and
- configuring the first device and the second device as a same channel type device.
A method comprising:
- providing a substrate;
- forming a first transistor having an n-channel and a first gate including an n-type work function material, the first transistor being operable at a first voltage;
- forming a second transistor having an n-channel and a second gate including a p-type work function material, the second transistor being operable at a second voltage, the second voltage being higher than the first voltage;
- forming a third transistor having a p-channel and a third gate including a p-type work function material, the third transistor being operable at a third voltage;
- forming a fourth transistor having a p-channel and a fourth gate including an n-type work function material, the fourth transistor being operable at a fourth voltage, the fourth voltage being higher than the third voltage;
- performing a first implantation process to form source/drain regions for the first and second transistors;
- and
- performing a second implantation process to form source/drain regions for the third and fourth transistors.
An apparatus comprising:
- a substrate having a first region and a second region;
- a first field effect transistor (FET) disposed in the first region of the substrate, the first FET being operable at a first voltage, and the first FET including a first gate electrode of a first metal-containing material having a first-type work function;
- a second FET disposed in the second region of the substrate, the second FET being operable at a second voltage greater than the first voltage, and the second FET including a second gate electrode of a second metal-containing material having a second type work function that is opposite the first-type work function material;
- wherein the first FET and the second FET are a same channel type.
Dependencies are inferred from the claim text.