Negative differential resistance device with high PVCR and fast switching speed and memory using the same
OwnerShu-Lu Cheninventor
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Abstract
A negative differential resistance (NDR) device is designed and a possible compact device implementation is presented. The NDR device includes a voltage blocker and a current blocker and exhibits high peak-to-valley current ratio (PVCR) as well as high switching speed. The corresponding process and design are completely compatible with contemporary Si CMOS technology and area efficient. A single-NDR element SRAM cell prototype with a compact size and high speed is also proposed as its application suitable for embedded memory.
Claims20
A negative differential resistance (NDR) device including:
- a first transistor including a first gate, a first input terminal and a first output terminal;
- and
- a second transistor with opposite polarity of said first transistor so that if the first transistor is an N type field effect transistor (FET), the second transistor has to be a P type FET, and if the first transistor is a P type FET, the second transistor has to be an N type FET, and said second transistor including a second gate, a second input terminal and a second output terminal;
- wherein said first input terminal and said second gate are electrically connected and substantially the same voltage is supplied to said first input terminal and said second gate;
- wherein said first output terminal is electrically connected to said second input terminal;
- wherein said NDR device provides a negative differential resistance behavior of a conducting current level decreasing while a voltage difference increases between said first input terminal and said second output terminal when a changeable input voltage is applied between the first input terminal and the second output terminal.
A negative differential resistance (NDR) memory device including:
- a first transistor including a first gate, a first input terminal and a first output terminal;
- and
- a second transistor with opposite polarity of said first transistor so that if the first transistor is an N type field effect transistor (FET), the second transistor has to be a P type FET, and if the first transistor is a P type FET, the second transistor has to be an N type FET, and said second transistor including a second gate, a second input terminal and a second output terminal;
- wherein said first input terminal and said second gate are electrically connected and substantially the same voltage are supplied to said first input terminal and said second gate;
- wherein said first output terminal is electrically connected to said second input terminal;
- wherein a negative differential resistance behavior of a conducting current level decreasing while a voltage difference increases is provided between the first input terminal and the second output terminal when a changeable input voltage is applied between the first input terminal and the second output terminal;
- a third transistor including a third gate, a third input terminal and a third output terminal;
- wherein said first input terminal is electrically connected to said third output terminal;
- whereby said NDR memory device provide data storage mechanism with small area and fast access speed.
Dependencies are inferred from the claim text.