Process for manufacturing a large-scale integration MOS device and corresponding MOS device

A MOS device comprising:

• a semiconductor body;
• a gate structure arranged above said semiconductor body and including a gate electrode;
• and
• a first doped region, formed within a first surface portion of said semiconductor body, at the sides of and partially underneath said gate structure;
• and
• a dielectric mirror arranged above a second surface portion of said semiconductor body;
• wherein said dielectric mirror is a Bragg reflector and comprises a plurality of pairs of a first mirror layer and a second mirror layer, set on top of one another;
• said first mirror layer and said second mirror layer having, respectively, a first refractive index and a second refractive index, which are different from one another;
• and
• further comprising a buffer region on said dielectric mirror, said buffer region having optical characteristics such as not to reduce a reflectivity of said dielectric mirror.

A MOS device comprising:

• a semiconductor body;
• a gate structure arranged above said semiconductor body and including a gate electrode;
• and
• a first doped region, formed within a first surface portion of said semiconductor body, at the sides of and partially underneath said gate structure;
• and
• a dielectric mirror arranged above a second surface portion of said semiconductor body;
• wherein said dielectric mirror is set above said gate electrode;
• further comprising a first electrical-contact structure, in electrical contact with said first doped region and set above said dielectric mirror;
• wherein said semiconductor body has a first type of conductivity, further comprising:
• a second doped region having a second type of conductivity set within said semiconductor body, at the sides of, and partially underneath, said gate structure, said first doped region being set within said second doped region, and having said first type of conductivity;
• and
• first spacers, made of insulating material, set at the sides of said gate structure and of said dielectric mirror,
• said first electrical-contact structure being in electrical contact also with said second doped region.

A MOS device comprising:

• a semiconductor body;
• a gate structure arranged above said semiconductor body and including a gate electrode;
• and
• a first doped region, formed within a first surface portion of said semiconductor body, at the sides of and partially underneath said gate structure;
• and
• a dielectric mirror arranged above a second surface portion of said semiconductor body;
• wherein said dielectric mirror is set in an area corresponding to said semiconductor layer, and said gate electrode is set at least in part above, and in contact with, said dielectric mirror;
• and
• wherein said semiconductor body has a first type of conductivity, further comprising a second doped region having a second type of conductivity arranged within said semiconductor body, at the sides of, and partially underneath, said gate structure, said first doped region being set within said second doped region and having said first type of conductivity;
• said gate electrode comprising one between:
• first gate portions set laterally in contact with said dielectric mirror, and extending above said first and second doped regions;
• or
• in addition to said first gate portions, second gate portions set on said dielectric mirror;
• or
• a single gate portion set laterally in contact with, and above, said dielectric mirror, and extending above said first doped region and said second doped region.

A structure formed on a semiconductor layer, comprising:

• a gate structure formed over the semiconductor layer;
• first doped regions formed within respective first portions of the semiconductor layer;
• and
• a dielectric mirror formed over a second portion of the substrate, the dielectric mirror being positioned between and not over adjacent first portions.

An electronic system, comprising:

• an electronic subsystem including a MOS device formed on an approximately flat semiconductor layer, the MOS device including,
• a gate structure formed over the semiconductor layer;
• first doped regions formed within respective first portions of the semiconductor layer;
• and
• a dielectric mirror formed over a second portion of the substrate, the dielectric mirror being positioned between and not over adjacent first portions.