Back to results
US 8,283,664 B2Granted
Disguising test pads in a semiconductor package
AssigneeSanDisk Technologies LLC
InventorArie Frenklakh
Life of this patent
Estimating the term…
Abstract
A method of forming a semiconductor package is disclosed including disguising the test pads. Test pads are defined in the conductive pattern of the semiconductor package for allowing electrical test of the completed package. The test pads are formed in shapes such as letters or objects so that they are less recognizable as test pads.
Claims17
A semiconductor package, comprising:
- a substrate having a conductive pattern, the conductive pattern including test pads for allowing electrical test of the semiconductor package;
- one or more semiconductor die coupled to the substrate;
- molding compound encapsulating the one or more semiconductor die and at least a portion of the substrate;
- a cover for covering the test pads;
- and
- a marking on the cover for disguising the cover by reducing the likelihood that the cover is recognizable as covering the test pads.
3 more elements
A semiconductor package, comprising:
- a substrate having a conductive pattern and test pads for allowing electrical test of the semiconductor package;
- one or more semiconductor die coupled to the substrate;
- molding compound encapsulating the one or more semiconductor die and at least a portion of the substrate, the molding compound leaving the test pads exposed;
- a cover for covering the test pads;
- and
- a marking on the cover for disguising the cover by reducing the likelihood that the cover is recognizable as covering the test pads;
- wherein the test pads are formed in a non-standard location and/or a non-standard configuration, for further disguising the cover by reducing the likelihood that the cover is recognizable as covering the test pads.
4 more elements
Dependencies are inferred from the claim text.