Nanowire memory
AssigneeElectronics and Telecommunications Research Institute
InventorsHan Young Yu, Byung Hoon Kim, Soon Young Oh, Yong Ju Yun, Yark Yeon Kim, Won Gi Hong
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AssigneeElectronics and Telecommunications Research Institute
InventorsHan Young Yu, Byung Hoon Kim, Soon Young Oh, Yong Ju Yun, Yark Yeon Kim, Won Gi Hong
Estimating the term…
Provided is a nanowire memory including a source and a drain corresponding to the source, and a nano channel formed to connect the source to the drain. Here, the nano channel includes a nanowire electrically connecting the source to the drain according to voltages of the source and drain, and a nanodot formed on the nanowire and having a plurality of potentials capturing charges. Thus, the nanowire memory has a simple structure, thereby simplifying a process. It can generate multi current levels by adjusting several energy states using gates, operate as a volatile or non-volatile memory by adjusting the gates and the energy level, and include another gate configured to adjust the energy level, resulting in formation of a hybrid structure of volatile and non-volatile memories.
A nanowire memory, comprising:
Dependencies are inferred from the claim text.