Multi-color read-out integrated circuit

A read out integrated circuit (ROTC), comprising a plurality of unit cells, each unit cell including:

• a bias subsystem connected between a photodiode input and a first stage node;
• a reset switch connected between the first stage node and a reset voltage rail;
• a first capacitor connected between the first stage node and a top-plate voltage rail;
• a first stage switch connected between the first stage node and a second stage node;
• a second capacitor connected between the second stage node and the top-plate voltage rail;
• a second stage switch connected between the second stage node and a third stage node;
• a third capacitor connected between the third stage node and the top-plate voltage rail;
• and
• a read switch connected between the third stage node and an output.

A focal plane array (FPA), comprising:

• a plurality of photo detectors disposed in a grid, the grid having a plurality of horizontal rows of photo detectors and a plurality of vertical columns of photo detectors, each photo detector having a first color photodiode and a second color photodiode;
• and
• a read out integrated circuit (ROIC) including:
• an integration subsystem coupled to each photo detector, each integration subsystem including:
• a first unit cell having a photodiode input coupled to the first color photodiode of a respective photo detector;
• and
• a second unit cell having a photodiode input coupled to the second color photodiode of the respective photo detector;
• a first column buffer and a second column buffer for each column of photo detectors;
• a first bus for each column of photo detectors, the first bus connecting an output of each first unit cell of the column to an input of the first column buffer of the column;
• a second bus for each column of photo detectors, the second bus connecting an output of each second unit cell of the column to an input of the second column buffer of the column;
• a control switching subsystem connected to an output of each column buffer;
• and
• at least one output driver connected to the control switching subsystem.

A column buffer, comprising:

• a first buffer subsystem having an input connected to an input node and an output connected to a first buffered node;
• a feedback subsystem connected between the input node and the first buffered node;
• a first correlated double sampling (CDS) subsystem connected between the first buffered node and a CDS output node;
• a second CDS subsystem connected between the first buffered node the CDS output node;
• and
• a second buffer subsystem including:
• an input connected to the CDS output node;
• an output connected to a column buffer bus node;
• and
• an enable input operable to control an operating state of the second buffer subsystem.

A read out integrated circuit (ROIC), comprising at least one integration subsystem, each integration subsystem including:

• a transistor subsection including:
• a nwell including:
• a p-channel depletion metal oxide field effect transistor of a biasing subsystem of a first unit cell;
• and
• a p-channel depletion metal oxide field effect transistor of a biasing subsystem of a second unit cell;
• and
• an n-channel depletion metal oxide field effect transistor subsection;
• a horizontal poly silicon layer adjacent to three sides of the transistor subsection;
• and
• a plurality of horizontal active layer sections disposed below the poly silicon layer, wherein each active layer section extends horizontally beyond an outline of the poly silicon layer solely along sides of the active layer section adjacent to the transistor subsection.