Multi-layer printed circuit board and method of manufacturing multilayer printed circuit board

A multi-layer printed circuit board comprising:

• a core structure comprising a plurality of resin layers and a metal layer sandwiched by the resin layers, the core structure having a first surface and a second surface on an opposite side of the first surface;
• a first conductor layer comprising a plurality of conductor circuits formed on the first surface of the core structure;
• and
• a second conductor layer comprising a plurality of conductor circuits formed on the second surface of the core structure,
• wherein the metal layer of the core structure comprises a plurality of conductor circuits, the core structure has a plurality of openings extending to at least one of the conductor circuits of the metal layer through the plurality of resin layers, respectively, and includes a first via hole and a second via hole formed in the openings, respectively, such that the first via hole and the second via hole sandwich the at least one of the conductor circuits of the metal layer in the core structure and are electrically connecting respective ones of the conductor circuits of the first and the second conductor layers, each of the first via hole and the second via hole comprises a plating material filling to a respective top of the openings and extending to a respective one of the first conductor layer and the second conductor layer, the first via hole and the second via hole are deviated from each other in a vertical direction, the first via hole has a bottom surface connected to the one of the conductor circuits of the metal layer in the core structure, the bottom surface of the first via hole has a diameter which is smaller than a diameter of the first via hole at an interface between the first conductor layer and the first surface of the core substrate, the second via hole has a bottom surface connected to the one of the conductor circuits of the metal layer in the core structure, and the bottom surface of the second via hole has a diameter which is smaller than a diameter of the second via hole at an interface between the second conductor layer and the second surface of the core substrate.