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US 8,283,261 B2Granted
Radical oxidation process for fabricating a nonvolatile charge trap memory device
AssigneeCypress Semiconductor Corporation
InventorKrishnaswamy Ramkumar
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Abstract
A method for fabricating a nonvolatile charge trap memory device is described. The method includes providing a substrate having a charge-trapping layer disposed Thereon. A portion of the charge-trapping layer is then oxidized to form a blocking dielectric layer above the charge-trapping layer by exposing the charge-trapping layer to a radical oxidation process.
Claims6
A method of fabricating a nonvolatile charge trap memory device, the method comprising:
- oxidizing a portion of a charge-trapping layer disposed above a substrate to form a blocking dielectric layer above the charge-trapping layer, the oxidizing performed by exposing the charge-trapping layer to a hydrogen and oxygen radical oxidation process, wherein the charge-trapping layer comprises a bottom oxygen-rich silicon oxy-nitride portion having a thickness approximately in the range of 2.5-3.5 nanometers and a top silicon-rich silicon oxy-nitride portion having a thickness approximately in the range of 9-10 nanometers, and wherein oxidizing the portion of the charge-trapping layer comprises oxidizing the top approximately 2 nanometers to approximately 3 nanometers of the top silicon-rich silicon oxy-nitride portion to form the blocking dielectric layer having a thickness approximately in the range of 3.5-4.5 nanometers.
A method of fabricating a nonvolatile charge trap memory device, comprising:
- subjecting, in a process chamber, a substrate to a first hydrogen and oxygen radical oxidation process to form a first dielectric layer;
- subjecting, in the process chamber, the substrate to a deposition process to form a charge-trapping layer above the first dielectric layer;
- and
- subjecting, in the process chamber, the substrate to a second hydrogen and oxygen radical oxidation process to form a second dielectric layer above the charge-trapping layer by oxidizing a portion of the charge-trapping layer, wherein the charge-trapping layer comprises a bottom oxygen-rich silicon oxy-nitride portion having a thickness approximately in the range of 2.5-3.5 nanometers and a top silicon-rich silicon oxy-nitride portion having a thickness approximately in the range of 9-10 nanometers, and wherein oxidizing the portion of the charge-trapping layer comprises oxidizing the top approximately 2 nanometers to approximately 3 nanometers of the top silicon-rich silicon oxy-nitride portion to form the second dielectric layer having a thickness approximately in the range of 3.5-4.5 nanometers.
1 more element
A method of fabricating a nonvolatile charge trap memory device, comprising:
- subjecting a substrate to an oxidation process to form a first dielectric layer;
- depositing a charge-trapping layer above the first dielectric layer, the charge-trapping layer comprising a bottom portion and a top portion;
- and
- subjecting the charge-trapping layer to a radical oxidation process to form a second dielectric layer above the charge-trapping layer by exposing the charge-trapping layer to a hydrogen (H2) and oxygen (O2) gas flow, forming radicals at a surface of the charge-trapping layer, and consuming a portion of the top portion of the charge-trapping layer to form the second dielectric layer,
- wherein the bottom portion of the charge-trapping layer comprises an oxygen-rich silicon oxy-nitride.
2 more elements
Dependencies are inferred from the claim text.