Semiconductor device including a die region designed for aluminum-free solder bump connection and a test structure designed for aluminum-free wire bonding

A method, comprising:

• forming a last metallization layer above each of a plurality of substrates, each of said plurality of substrates comprising a device region and a test region;
• selecting one of said plurality of substrates as a test substrate for assessing one or more characteristics of semiconductor devices provided in said device region;
• forming a final dielectric layer stack in said test region and said device region of said selected test substrate, said final dielectric layer stack comprising a passivation layer stack and a dielectric layer formed above said passivation layer;
• patterning said final dielectric stack of said selected substrate after forming said final dielectric stack to expose a first portion of said device region and a second portion of said test region;
• forming a metal stack after patterning said final dielectric stack over said first and second exposed portions of said device region and said test region of said test substrate, said metal stack connecting to said last metallization layer and enabling direct wire bonding;
• forming a dielectric layer stack having a structure of said final dielectric layer stack and a further metal stack at least in said device regions of non-selected ones of said plurality of substrates;
• and
• forming a solder material on said further metal stack formed on said non-selected substrates.