US 8,283,209 B2 · Semiconductor device and method of forming PiP with inner known good die interconnected with conductive bumps

Abstract

A PiP semiconductor device has an inner known good semiconductor package. In the semiconductor package, a first via is formed in a temporary carrier. A first conductive layer is formed over the carrier and into the first via. The first conductive layer in the first via forms a conductive bump. A first semiconductor die is mounted to the first conductive layer. A first encapsulant is deposited over the first die and carrier. The semiconductor package is mounted to a substrate. A second semiconductor die is mounted to the first conductive layer opposite the first die. A second encapsulant is deposited over the second die and semiconductor package. A second via is formed in the second encapsulant to expose the conductive bump. A second conductive layer is formed over the second encapsulant and into the second via. The second conductive layer is electrically connected to the second die.

Claims25

Dependent claims

A method of manufacturing a semiconductor device, comprising:

providing a temporary carrier;
forming a first via in the temporary carrier;
forming a first conductive layer over the temporary carrier and into the first via, the first conductive layer in the first via forming a conductive bump;
mounting a first semiconductor die to the first conductive layer;
forming a bond wire between the first semiconductor die and first conductive layer;
depositing a first encapsulant over the first semiconductor die, first conductive layer, temporary carrier, and bond wire;
removing the temporary carrier to provide a semiconductor package with the conductive bump exposed;
providing a substrate;
mounting a surface of the semiconductor package opposite the conductive bump to the substrate;
mounting a second semiconductor die to the first conductive layer opposite the first semiconductor die;
depositing a second encapsulant over the second semiconductor die and semiconductor package;
forming a second via in the second encapsulant to expose the conductive bump;
and
forming a second conductive layer over the second encapsulant and into the second via, the second conductive layer being electrically connected to the second semiconductor die.

11 more elements

A method of manufacturing a semiconductor device, comprising:

providing a carrier;
forming a first via in the carrier;
forming a first conductive layer over the carrier and into the first via, the first conductive layer in the first via forming a conductive bump;
mounting a first semiconductor die or component to the first conductive layer;
depositing a first encapsulant over the first semiconductor die or component, first conductive layer, and carrier;
removing the carrier to provide a semiconductor package including the conductive bump exposed;
providing a support layer;
mounting the semiconductor package to the support layer;
mounting a second semiconductor die or component to the first conductive layer opposite the first semiconductor die or component;
depositing a second encapsulant over the second semiconductor die or component and semiconductor package;
and
forming an interconnect structure over the second encapsulant, the interconnect structure being electrically connected to the conductive bump and second semiconductor die or component.

9 more elements

Dependencies are inferred from the claim text.

Semiconductor device and method of forming PiP with inner known good die interconnected with conductive bumps

Life of this patent

Semiconductor device and method of forming PiP with inner known good die interconnected with conductive bumps

Life of this patent

Abstract

Claims25