Decoding circuit operating in response to decoded result and/or a plurality of viterbi target levels with pattern dependency

A decoding circuit, comprising:

• a Viterbi decoder arranged to perform Viterbi decoding according to a plurality of Viterbi target levels with pattern dependency, wherein the Viterbi decoder comprises a branch metric generator arranged to generate a plurality of branch metrics with pattern dependency according to an input of the Viterbi decoder and the Viterbi target levels with pattern dependency, and the branch metric generator comprises:
• a plurality of branch metric generation paths arranged to generate a plurality of intermediate values according to the input of the Viterbi decoder and the Viterbi target levels with pattern dependency, respectively;
• and
• a selection unit arranged to select a portion of the intermediate values as the branch metrics with pattern dependency.

A decoding circuit, comprising:

• a Viterbi decoder arranged to perform Viterbi decoding according to a Viterbi target level, wherein the Viterbi decoder comprises a branch metric generator arranged to generate at least a portion of a plurality of branch metrics with pattern dependency according to an input of the Viterbi decoder and the Viterbi target level, and the branch metric generator comprises:
• a branch metric generation path arranged to generate an intermediate value according to the input of the Viterbi decoder and the Viterbi target level;
• and
• a selection unit arranged to select the intermediate value or a constant value as at least the portion of the branch metrics with pattern dependency according to a control signal with pattern dependency.

A decoding circuit, comprising:

• a Viterbi decoder arranged to perform Viterbi decoding according to a control signal, wherein the Viterbi decoder comprises:
• a branch metric generator arranged to generate a plurality of branch metrics according to an input of the Viterbi decoder and the control signal;
• an add-compare-select (ACS) unit arranged to perform ACS operations according to the branch metrics to generate a plurality of decision bits;
• and
• a survivor path memory arranged to temporarily store the decision bits and output an output of the Viterbi decoder.