Memory system
AssigneeKabushiki Kaisha Toshiba
InventorsJunji Yano, Hidenori Matsuzaki, Kosuke Hatsuda, Hiroki Matsudaira
Life of this patent
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Abstract
A memory system includes a controller that manages data stored in the first and second storing areas. The controller determines, when a readout error occurs when the stored data in the second storing area is read out, success or failure of error correction to the read-out data based on the result of the error correction stored in a storage buffer, writes, when the error correction is successful, correction data corresponding to the read-out data stored in the storage buffer, and writes, when the error correction fails, the read-out data itself not subjected to error correction processing.
Claims26
A memory system comprising:
- a nonvolatile memory including a plurality of blocks, each of the plurality of blocks being a unit of data erasing and including a plurality of pages, each of the plurality of pages being a unit of data programming;
- and
- a controller configured to
- manage data storage positions in the nonvolatile memory with addresses aligned by a management unit having a size larger than a sector and smaller than a block, the sector being a unit of data accessing to the memory system, and
- manage bad sector positions by a plurality of flags indicating whether each of sectors is invalid, the plurality of flags provided only for each of the addresses aligned by the management unit where a readout error has occurred.
A method of controlling a nonvolatile memory including a plurality of blocks, each of the plurality of blocks being a unit of data erasing and including a plurality of pages, each of the plurality of pages being a unit of data programming, the method comprising:
- managing data storage positions in the nonvolatile memory with addresses aligned by a management unit having a size larger than a sector and smaller than a block, the sector being a unit of data accessing to the memory system;
- and
- managing bad sector positions by a plurality of flags indicating whether each of sectors is invalid, the plurality of flags provided only for each of the addresses aligned by the management unit where a readout error has occurred.
Dependencies are inferred from the claim text.