Methods for forcing an update block to remain sequential
AssigneeSanDisk Technologies LLC
InventorSergey Anatolievich Gorobets
Life of this patent
Estimating the term…
Abstract
A method for operating a memory system is provided. In this method, a sequential update block and preexisting data associated with the sequential update block are provided. Here, an option to convert the sequential update block to a chaotic update block also is provided. A write command is received to write data following a previous write command, where the write command and the previous write command have a discontinuity in logical addresses. If a logical address of the write command is different from logical addresses of the preexisting data, then the data are written to the sequential update block. If the logical address of the write command matches one of the logical addresses of the preexisting data, then the sequential update block is converted to a chaotic update block.
Claims12
A method for operating a memory system, comprising:
- providing a sequential update block having preexisting data from a previous write command, wherein the preexisting data has a plurality of logical addresses;
- receiving a write command to write data following the previous write command, wherein the data of the received write command has a plurality of logical addresses;
- prior to writing the data, determining that the logical addresses of the data of the received write command have both a discontinuity and an overlap with the logical addresses of the preexisting data that has been previously written to the sequential update block;
- and
- in response to determining that the logical address of the received write command have both a discontinuity and an overlap with the logical addresses of the logical addresses of the preexisting data that has been previously written to the sequential update block, converting the sequential update block to a chaotic update block and writing the data to the chaotic update block so as to write such data over the preexisting data.
A non-volatile memory storage system, comprising:
- a non-volatile memory cell array;
- and
- a processor in communication with the non-volatile memory cell array, the processor being configured to:
- in the non-volatile memory array, provide a sequential update block having preexisting data from a previous write command, wherein the preexisting data has a plurality of logical addresses;
- receive a write command to write data following the previous write command, wherein the data of the received write command has a plurality of logical addresses;
- prior to writing the data, determine that the logical addresses of the data of the received write command have both a discontinuity and an overlap with the logical addresses of the preexisting data that has been previously written to the sequential update block;
- and
- in response to determining that the logical address of the received write command have both a discontinuity and an overlap with the logical addresses of the logical addresses of the preexisting data that has been previously written to the sequential update block, convert the sequential update block to a chaotic update block and write the data to the chaotic update block so as to write such data over the preexisting data.
Dependencies are inferred from the claim text.