Implementing serial link training patterns separated by random data for training a serial link in an interconnect system

A circuit for implementing serial link training sequences for training a serial link in an interconnect system comprising:

• a link interface coupled to the serial link, said link interface including a transmit device coupled to the serial link for transmitting data and a receiver device coupled to the serial link for receiving data;
• said transmit device, transmitting a training sequence (TS) pattern;
• said transmit device, transmitting random data for a predefined time duration;
• said transmit device, repeating the steps of transmitting the TS-pattern, and transmitting the random data for the predefined time duration;
• said receiver device performing receiver initialization steps,
• said transmit device, advancing to a next TS-pattern when said receiver device detects a current TS-pattern and said receiver device being ready for initialization to advance;
• and
• said transmit device, repeating the steps of transmitting the next TS-pattern, and transmitting the random data for the predefined time duration, said receiver device performing receiver initialization steps.

A multiple-path local rack interconnect system comprising:

• a plurality of interconnect chips;
• a plurality of serial links connected between each of said plurality of interconnect chips;
• each of said interconnect chips including a link interface for implementing serial link training sequences, said link interface coupled to the serial link, said link interface including a transmit device coupled to the serial link for transmitting data and a receiver device coupled to the serial link for receiving data;
• said transmit device, transmitting a training sequence (TS) pattern;
• said transmit device, transmitting random data for a predefined time duration;
• and
• said transmit device, repeating the steps of transmitting the TS-pattern, and transmitting the random data for the predefined time duration, said receiver device performing receiver initialization steps,
• said transmit device, advancing to a next TS-pattern when said receiver device detects a current TS-pattern and said receiver device being ready for initialization to advance;
• and
• said transmit device, repeating the steps of transmitting the next TS-pattern, and transmitting the random data for the predefined time duration, said receiver device performing receiver initialization steps.

A design structure embodied in a machine readable medium used in a design process, the design structure comprising:

• a circuit tangibly embodied in the machine readable medium used in the design process, said circuit for implementing serial link training sequences for training a serial link, said circuit comprising:
• a link interface coupled to the serial link, said link interface including a transmit device coupled to the serial link for transmitting data and a receiver device coupled to the serial link for receiving data;
• said transmit device, transmitting a training sequence (TS) pattern;
• said transmit device, transmitting random data for a predefined time duration;
• and
• said transmit device, repeating the steps of transmitting the TS-pattern, and transmitting the random data for the predefined time duration, said receiver device performing receiver initialization steps,
• said transmit device, advancing to a next TS-pattern when said receiver device detects a current TS-pattern and said receiver device being ready for initialization to advance;
• and
• said transmit device, repeating the steps of transmitting the next TS-pattern, and transmitting the random data for the predefined time duration, said receiver device performing receiver initialization steps, wherein the design structure, when read and used in the manufacture of a semiconductor chip produces a chip comprising said circuit.