Broadband low noise complex frequency multipliers

A method of performing frequency multiplication comprising the steps of:

• receiving a complex input signal having a cosine portion and a sine portion;
• coupling said complex input signal to a plurality of multipliers, said multipliers including a first multiplier, a second multiplier, a third multiplier and a fourth multiplier, said first multiplier having a first input port and a second input port and receiving said cosine portion of said complex input signal at said first input port and said second input port;
• said second multiplier having a first input port and a second input port and receiving said sine portion of said complex input signal at said first input port and said second input port;
• said third multiplier having a first input port and a second input port and receiving said sine portion of said complex input signal at said first input port and said cosine portion of said complex input signal at said second input port;
• and said fourth multiplier having a first input port and a second input port and receiving said cosine portion of said complex input signal at said first input port and said sine portion of said complex input signal at said second input port;
• coupling an output of said first multiplier and an output of said second multiplier to a first combiner;
• and
• coupling an output of said third multiplier and an output of said fourth multiplier to a second combiner.

A method for performing complex frequency multiplication comprising the steps of:

• receiving a complex input signal;
• generating a complex up-converted signal by mixing said complex input signal with itself;
• and
• outputting said complex up-converted signal,
• wherein said complex up-converted signal is generated utilizing a plurality of mixers, said mixers including a first mixer, a second mixer, a third mixer and a fourth mixer, said first mixer having a first input port and a second input port and receiving said cosine portion of said complex input signal at said first input port and said second input port;
• said second mixer having a first input port and a second input port and receiving said sine portion of said complex input signal at said first input port and said second input port;
• said third mixer having a first input port and a second input port and receiving said sine portion of said complex input signal at said first input port and said cosine portion of said complex input signal at said second input port;
• and said fourth mixer having a first input port and a second input port and receiving said cosine portion of said complex input signal at said first input port and said sine portion of said complex input signal at said second input port.

A frequency multiplier apparatus comprising:

• a plurality of complex frequency multiplier devices coupled in a cascaded configuration, each of said complex frequency multiplier devices including:
• a plurality of multipliers, each of which has a first input port, a second input port and an output port;
• a first combiner coupled to said plurality of multipliers so as to receive an output signal from at least two of said plurality of multipliers, said first combiner outputting a first output signal;
• and
• a second combiner coupled to said plurality of multipliers so as to receive an output signal from at least two of said plurality of multipliers, said second combiner outputting a second output signal;
• wherein said plurality of multipliers includes a first multiplier, a second multiplier, a third multiplier and a fourth multiplier, said first multiplier having a first input port and a second input port and receiving a first input signal at said first input port and said second input port;
• said second multiplier having a first input port and a second input port and receiving a second input signal at said first input port and said second input port;
• said third multiplier having a first input port and a second input port and receiving said second input signal at said first input port and said first input signal at said second input port;
• and said fourth multiplier having a first input port and a second input port and receiving said first input signal at said first input port and said second input signal at said second input port.