High speed memory simulation
AssigneeCadence Design Systems, Inc.
InventorsChanhee Oh, John F. Croix, Curtis L. Ratzlaff, Ramon D. Acosta
Life of this patent
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Abstract
In one embodiment, a method comprises creating a simulation model for a column of bit cells in a memory, simulating the simulation model to generate a result; and displaying the result for a user. Each of the bit cells in the column is coupled to a different wordline, and the simulation model comprises one or more linear elements in place of a nonlinear element in each bit cell that is coupled to an inactive wordline. The one or more linear elements approximate a behavior of the nonlinear element while the wordline is inactive. A computer accessible storage medium storing a simulator that implements the method is contemplated, and the simulator itself is also contemplated, in various embodiments.
Claims29
A method comprising:
- creating a transient simulation model for a column of bit cells in a memory, wherein each of the bit cells in the column is coupled to a different wordline, and wherein the transient simulation model comprises the selection of one or more linear devices in place of a nonlinear device in each bit cell that is coupled to an inactive wordline, and wherein the one or more linear devices approximate a behavior of the nonlinear device while the wordline is inactive;
- simulating the transient simulation model to generate a result based upon, at least in part, a user input stimulus, wherein none of the wordlines are active during at least a portion of the simulation, and wherein each bit cell in the column is modeled in the simulation model with the linear devices replacing the nonlinear device for at least the portion of the simulation;
- and
- displaying the result for a user.
A non-transitory computer accessible storage medium storing a plurality of instructions which, when executed:
- create a transient simulation model for a column of bit cells in a memory, wherein each of the bit cells in the column is coupled to a different wordline, and wherein the transient simulation model comprises the selection of one or more linear devices in place of a nonlinear device in each bit cell that is coupled to an inactive wordline, and wherein the one or more linear devices approximate a behavior of the nonlinear device while the wordline is inactive;
- simulate the transient simulation model to generate a result, based upon, at least in part, a user input stimulus, wherein none of the wordlines are active during at least a portion of the simulation, and wherein each bit cell in the column is modeled in the simulation model with the linear devices replacing the nonlinear device for at least the portion of the simulation;
- and
- display the result for a user.
A method comprising:
- creating a transient simulation model for a column of bit cells in a memory wherein each of the bit cells in the column is coupled to a different wordline, and wherein the transient simulation model comprises the selection of one or more linear devices in place of a nonlinear device in each bit cell that is coupled to an inactive wordline, and wherein the one or more linear devices approximate a behavior of the nonlinear device while the wordline is inactive;
- simulating the transient simulation model to generate a result based upon, at least in part, a user input stimulus, wherein one of the wordlines is active during a portion of the simulation, and wherein the simulation model comprises a bit cell model for the bit cell that is coupled to the active wordline during at least the portion of the simulation;
- displaying the result for a user.
Dependencies are inferred from the claim text.