Unified model for process variations in integrated circuits
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChung-Kai Lin, Cheng Hsiao, Sally Liu
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChung-Kai Lin, Cheng Hsiao, Sally Liu
Estimating the term…
A method of developing a statistical model for integrated circuits includes providing a set of test patterns; collecting a set of intra-die data from the set of test patterns; collecting a set of inter-die data from the set of test patterns; generating a total variation sigma (sigma_total) from the set of intra-die data and the set of inter-die data; appointing one of a global variation sigma (sigma_global) and a local variation sigma (sigma_local) as a first sigma, and a remaining one as a second sigma; generating the first sigma from one of the set of intra-data and the set of inter-data; generating the second sigma by removing the first sigma from the sigma_total; generating a corner model for global variations based on sigma_global and the set of inter-die data; and generating a corner model for local variations based on sigma_local and the set of intra-die data.
A method of developing a statistical model for integrated circuits, the method comprising:
A method of developing a statistical model for integrated circuits, the method comprising:
A method of developing a statistical model for integrated circuits, the method comprising:
Dependencies are inferred from the claim text.