US 8,275,560 B2 · Power measurement techniques of a system-on-chip (SOC)

Abstract

A method and system to enable power measurements of a system-on-chip in various modes. In one embodiment of the invention, the system-on-chip has full controllability of its logic and circuitry to facilitate configuration of the system-on-chip into a desired mode of operation. This allows hooks or interfaces to access the system-on-chip externally for measurements. For example, in one embodiment of the invention, the hooks in the system-on-chip allow a backend tester to configure the system-on-chip into various modes easily to perform power consumption measurements of one or more individual components of the system-on-chip. The power consumption measurement of the individual components in the system-on-chip can be performed faster and can be more accurate. In addition, the overall yield of the SOC can be increased as it is easier to detect failure parts.

Claims24

Dependent claims

A method comprising:

setting one or more interfaces of a system-on-chip (SOC) into an idle mode, wherein setting the one or more interfaces of the SOC into the idle mode comprises setting one or more mode registers associated with the one of more interfaces of the SOC;
setting one or more processor cores in the SOC into an idle state;
disabling one or more clock inputs to the SOC;
reducing a voltage level of one or more logic blocks of the SOC, the one or more logic blocks having a common voltage plane;
and
measuring a power consumption of the SOC.

3 more elements

Dependencies are inferred from the claim text.

Power measurement techniques of a system-on-chip (SOC)

Life of this patent

Power measurement techniques of a system-on-chip (SOC)

Life of this patent

Abstract

Claims24