Compact dual receiver architecture for point to point radio

A radio frequency receiver system comprising:

• an electronics rack having an electrical backplane;
• a plurality of radio frequency (“RF”) receivers each operatively connected to said backplane, each receiver comprising:
• a receiver module which receives an RF signal and provides a baseband in-phase (“I”) signal and a baseband quadrature (“Q”) signal, eliminates a sideband of said I signal and a sideband of said Q signal to create a first and a second signal, downconverts said first and second signal to a first and a second intermediate frequency (“IF”) signal, and selects one of said first or second IF signals;
• an IF module which receives said first or second IF signal, performs analog-to-digital conversion on said first or second IF signal, and demodulates said digitally converted IF signal;
• a synthesizer module which receives a programmable reference signal, downconverts said reference signal to an IF feedback signal, downconverts said reference signal to a baseband feedback signal, provides said IF feedback signal to said IF module, and provides said baseband feedback signal to said receiver module;
• a programmable reference signal generator comprising an integrated circuit configured to sample said digitally converted IF signal, said integrated circuit comprising a numerically controlled oscillator configured to provide said programmable reference signal to said synthesizer module;
• said programmable reference signal generator configured to provide a demodulated output signal derived from said digitally converted IF signal;
• and
• a frequency locking circuit;
• and
• a data processing unit (“DPU”) operatively connected to said backplane, said DPU having a first and a second common reference signal generator, wherein each said common reference generator is switchably connected to said programmable reference signal generator via said frequency locking circuit.

A method for receiving a signal comprising the steps of:

• providing a co-located modem and receiver in an assembly;
• receiving a baseband signal at a receiver module in said receiver;
• providing a baseband in-phase (“I”) signal and a baseband quadrature (“Q”) signal;
• eliminating a sideband of said I signal and a sideband of said Q signal to create a first and a second signal;
• downconverting said first and second signal to a first and a second intermediate frequency (“IF”) signal;
• selecting one of said first or second IF signals;
• performing analog-to-digital conversion on said first or second IF signal by an IF module;
• sampling, using an integrated circuit, said digitally converted IF signal;
• providing, using a numerically controlled oscillator in said integrated circuit, a reference signal as a function of said sampled IF signal;
• providing a baseband feedback signal to said receiver module as a function of said reference signal;
• providing an IF feedback signal to said IF module as a function of said reference signal;
• demodulating said digitally converted IF signal to thereby provide a demodulated output signal;
• and
• providing thermal compensation for temperature changes in said receiver based on temperature changes in said IF module.