US 8,275,049 B2 · Systems and methods of improved motion estimation using a graphics processing unit

Abstract

Disclosed is a graphics processing unit comprising an instruction decoder and sum-of-absolute-differences (SAD) accleration logic. The instruction decoder is configured to decode a SAD instruction into parameters describing an M×N and an n×n pixel block in U,V coordinates. The SAD accleration logic is configured to receive the parameters and compute SAD scores. Each SAD score corresponds to the n×n block and to one block contained within the M×N pixel block and horizontally offset within the n×n block. Also disclosed is a GPU comprising a host processor interface receiving video acceleration instructions and a video acceleration unit. The unit is responsive to the instructions and comprises SAD accleration logic configured to receive the parameters and compute SAD scores. Each SAD score corresponds to an n×n pixel block and to one block contained within an M×N block and horizontally offset within the n×n block. M, N, and n are integers.

Claims20

Dependent claims

A graphics processing unit (GPU) comprises:

an instruction decoder configured to decode a sum-of-absolute-differences (SAD) instruction into a plurality of parameters describing an M×N pixel block and an n×n pixel block in U,V coordinates, where M, N, and n are integers;
and
sum-of-absolute-differences (SAD) acceleration logic configured to receive the plurality of parameters and to compute a plurality of SAD scores, each SAD score corresponding to the n×n pixel block and to one of a plurality of blocks that are contained within the M×N pixel block and are horizontally offset within the M×N pixel block.

Dependencies are inferred from the claim text.

Systems and methods of improved motion estimation using a graphics processing unit

Life of this patent

Systems and methods of improved motion estimation using a graphics processing unit

Life of this patent

Abstract

Claims20