Semiconductor system
AssigneeElpida Memory, Inc.
InventorHideyuki Yoko
Life of this patent
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Abstract
To provide a semiconductor system including a plurality of core chips and an interface chip that controls the core chips. Each of the core chips includes an internal voltage generating circuit. The interface chip includes an unused chip information holding circuit that stores therein unused chip information of the core chips. The core chips respectively receive the unused chip information from the unused chip information holding circuit. When the unused chip information indicates an unused state, the internal voltage generating circuits are inactivated, and when the unused chip information indicates a used state, the internal voltage generating circuits are activated. With this configuration, unnecessary power consumption by the unused chips is reduced.
Claims8
A semiconductor system comprising:
- a plurality of controlled chips each of which includes an internal voltage generating circuit;
- and a controlling chip that controls the controlled chips, wherein
- the controlling chip includes an unused chip information holding circuit that stores therein unused chip information of the controlled chips, and
- each of the controlled chips receives corresponding one of the unused chip information from the unused chip information holding circuit, inactivates the internal voltage generating circuit when the unused chip information indicates an unused state, and activates the internal voltage generating circuit when the unused chip information indicates a used state.
Dependencies are inferred from the claim text.