Mitigation of runaway programming of a memory device
AssigneeMicron Technology, Inc.
InventorsVishal Sarin, Jonathan Pabustan, Frankie F. Roohparvar
Life of this patent
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Abstract
Methods for mitigating runaway programming in a memory device, methods for program verifying a memory device, a memory device, and a memory system are provided. In one such method, a ramp voltage signal is generated by a digital count signal. A memory cell being program verified is turned on by a particular verify voltage of the ramp voltage signal in response to a digital count of the digital count signal. The memory cell turning on generates a bit line indication that causes the digital count to be compared to a representation of the target data to be programmed in the memory cell. The comparator circuit generates an indication when the digital count is greater than or equal to the target data.
Claims20
A method for programming a memory device, the method comprising:
- generating a verify voltage responsive to a count wherein the verify voltage is configured to activate a memory cell;
- and
- generating an indication signal when the count is greater than or equal to target data stored in the memory cell.
A method for programming a memory device, the method comprising:
- storing, to a latch, target data to which a memory cell is to be programmed;
- applying a programming pulse to the memory cell;
- and
- performing a program verify operation on the memory cell after the programming pulse, the program verify operation comprising:
- biasing the memory cell with a ramped voltage signal;
- generating a digital representation of the ramped voltage signal;
- detecting when the memory cell is activated responsive to a particular voltage of the ramped voltage signal;
- and
- generating a program verify indication when the digital representation of the particular voltage is greater than or equal to the latch target data.
A memory device comprising:
- an array of memory cells;
- a ramped voltage signal generator configured to generate a ramped voltage signal comprising a plurality of voltages, the ramped voltage signal generator coupled to control gates of memory cells of the array of memory cells;
- an analog-to-digital converter coupled to the ramped voltage signal generator and configured to generate a digital representation of each of the plurality of voltages;
- latches configured to store target data during a program verify operation of a memory cell, the target data indicative of data stored in the memory cell;
- and
- a greater-than-or-equal-to circuit coupled to the array of memory cells that is configured to generate a verify indication signal during the program verify operation when a digital representation of a voltage that activates the memory cell is greater than or equal to the target data.
Dependencies are inferred from the claim text.