Multi-level cell access buffer with dual function
AssigneeMosaid Technologies Incorporated
InventorHong Beom Pyeon
Life of this patent
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Abstract
An access buffer, such as page buffer, for writing to non-volatile memory, such as Flash, using a two-stage MLC (multi-level cell) operation is provided. The access buffer has a first latch for temporarily storing the data to be written. A second latch is provided for reading data from the memory as part of the two-stage write operation. The second latch has an inverter that participates in the latching function when reading from the memory. The same inverter is used to produce a complement of an input signal being written to the first latch with the result that a double ended input is used to write to the first latch.
Claims17
An apparatus for writing to a non-volatile memory, the apparatus comprising:
- a single-ended input for receiving a single-ended input signal having an input bit to be written to the memory;
- first and second latches, the first latch having a double-ended input, for receiving a double-ended input signal containing the input bit, the second latch being configured to latch a value read from a lower page of a memory location of the non-volatile memory;
- and
- a processor for producing a complement of the single-ended input signal, the double-ended input signal comprising the complement of the single-ended input signal and the single-ended input signal.
A method for writing to a non-volatile memory, the method comprising:
- receiving a single-ended input signal having an input bit to be written to the memory;
- producing a complement of the single-ended input signal using an input inverter comprising a driving inverter, the complement of the single-ended input signal and the single-ended input signal in combination forming a double-ended input signal;
- latching the input bit into a first latch having a double-ended input;
- and
- latching a value read from a lower page of a memory location of the non-volatile memory into a second latch.
A system comprising:
- a non-volatile memory structure;
- an access buffer for writing to the non-volatile memory structure, the access buffer comprising:
- a latch circuit having a first input and a second input, the latch circuit comprising an inverter having the second input;
- the access buffer having a first mode of operation in which a first signal received at the first input is latched by the latch circuit;
- the access buffer having a second mode of operation in which a second signal received at the second input is inverted by the inverter.
Dependencies are inferred from the claim text.