Nonvolatile semiconductor memory device

A nonvolatile semiconductor memory device, comprising:

• a plurality of first lines;
• a plurality of second lines extending so as to intersect the first lines;
• a plurality of memory cells disposed at intersections of the first lines and the second lines, each of the memory cells including a variable resistor;
• and
• a control circuit for controlling a voltage applied to the memory cells,
• the control circuit applying a first pulse voltage to the variable resistor during a forming operation, and applying a second pulse voltage to the variable resistor during a setting operation, the second pulse voltage having a polarity opposite to the first pulse voltage, and
• the control circuit comprising a current limiting circuit for limiting a current flowing in the memory cells in a first direction and in a second direction, the second direction being an opposite direction to the first direction.

A nonvolatile semiconductor memory device, comprising:

• a plurality of first lines;
• a plurality of second lines extending so as to intersect the first lines;
• a plurality of memory cells disposed at intersections of the first lines and the second lines, each of the memory cells including a variable resistor;
• and
• a control circuit for controlling a voltage applied to the memory cells,
• the control circuit applying a first pulse voltage to the variable resistor during a forming operation, and applying a third pulse voltage to the variable resistor during a resetting operation, the third pulse voltage having a polarity identical to the first pulse voltage, and
• the control circuit comprising a current limiting circuit for limiting a current flowing in the memory cells in a first direction and in a second direction, the second direction being an opposite direction to the first direction.