Semiconductor device including storage device and method for driving the same

A semiconductor device including a memory cell, the memory cell comprising:

• a memory element having:
• a first conductive layer comprising tungsten;
• an amorphous silicon film over the first conductive layer;
• and
• a second conductive layer comprising titanium over the amorphous silicon film;
• a circuit configured to change polarity of voltage applied to the memory element for writing and for reading, the circuit comprising at least first and second transistors, wherein first electrodes of the first and second transistors are electrically connected to the first conductive layer of the memory element;
• a first wiring electrically connected to a second electrode of the first transistor;
• a second wiring electrically connected to a gate electrode of the first transistor;
• and
• a third wiring electrically connected to the second conductive layer of the memory element.

A semiconductor device including a storage device, the storage device comprising:

• a memory element having:
• a first conductive layer comprising tungsten;
• an amorphous silicon film over the first conductive layer;
• and
• a second conductive layer comprising titanium over the amorphous silicon film;
• a circuit configured to change polarity of voltage applied to the memory element for writing and for reading, the circuit comprising first to third transistors, wherein first electrodes of the first and second transistors are electrically connected to the first conductive layer of the memory element;
• a first wiring electrically connected to a second electrode of the first transistor;
• a second wiring electrically connected to gate electrodes of the first and second transistors;
• and
• a third wiring electrically connected to the second conductive layer of the memory element and a second electrode of the second transistor.

A method for driving a semiconductor device including a memory cell including:

• a memory element in which an amorphous silicon film is formed between a first conductive layer and a second conductive layer;
• a circuit comprising first and second transistors, and first to third wirings electrically connected to the memory element and the circuit, comprising the steps of:
• for writing data into the memory element, applying a first voltage value to a gate electrode of the first transistor to turn the first transistor on by setting the first and second wirings to a HIGH level;
• and
• applying a second voltage value to a gate electrode of the second transistor to turn the second transistor off by setting the third wiring to a LOW level,
• thereby applying the first voltage value to the first conductive layer and the second voltage value to the second conductive layer, and then siliciding the amorphous silicon film of the memory element;
• and
• for reading the data written into the memory element, applying the first voltage value to the gate electrode of the first transistor to turn the first transistor on by setting the first wiring to a floating state and the second wiring to a HIGH level;
• and
• applying the first voltage value to the gate electrode of the second transistor to turn the second transistor on by setting the third wiring to a HIGH level,
• wherein the first voltage value is higher than the second voltage value, and
• wherein when reading the data written into the memory element, a potential of the first conductive layer is read out from a second electrode of the first transistor.

A method for driving a semiconductor device including a memory cell including:

• a memory element in which an amorphous silicon film is formed between a first conductive layer and a second conductive layer;
• a circuit comprising first to third transistors, the first transistor having a first electrode electrically connected to the first conductive layer;
• the third transistor having a first electrode electrically connected to the first conductive layer;
• and the second transistor having a first electrode electrically connected to a gate electrode of the third transistor and a second electrode electrically connected to the second conductive layer;
• and first to third wirings electrically connected to the memory element and the circuit, comprising the steps of:
• for writing data into the memory element, setting the first wiring to a HIGH level and second wiring to a LOW level and applying a first voltage value to the gate electrode of the first transistor to turn the first transistor on;
• applying the first voltage value to a gate electrode of the second transistor to turn the second transistor on;
• applying a second voltage value to the gate electrode of the third transistor to turn the third transistor off;
• thereby applying the first voltage value to the first conductive layer and the second voltage value to the second conductive layer, and then siliciding the amorphous silicon film;
• and
• for reading the data written into the memory element, setting the first wiring to a floating state and second and third wirings to a HIGH level and applying the first voltage value to the second conductive layer and applying the second voltage value to the first conductive layer,
• wherein the first voltage value is higher than the second voltage value, and
• wherein for reading the data written into the memory element, the first voltage value is applied to the gate electrode of the first transistor, the gate electrode of the second transistor, and the gate electrode of the third transistor to turn them on, and a potential of the first conductive layer is read out from a second electrode of the first transistor.

A method for driving a semiconductor device including a memory cell including:

• a memory element in which an amorphous silicon film is formed between a first conductive layer comprising tungsten and a second conductive layer comprising titanium;
• and a circuit comprising at least a transistor,
• the method comprising the steps of:
• for writing data into the memory element, applying a first voltage value to the first conductive layer of the memory element and applying a second voltage value to the second conductive layer of the memory element;
• and
• for reading the data written into the memory element, applying the second voltage value to the first conductive layer of the memory element and applying the first voltage value to the second conductive layer of the memory element,
• wherein the first voltage value is higher than the second voltage value.