# US 8,274,813 B2 · Memristive negative differential resistance device

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- Number: US 8,274,813 B2
- Document ID: US8274813B2
- Status: Granted
- Kind: B2
- Application number: 12/837,903
- Filed: 2010-07-16
- Published: 2012-01-19
- Granted: 2012-09-25
- Earliest claimed: 2010-07-16
- Assignees: Hewlett-Packard Development Company, L.P.
- Inventors: Matthew D. Pickett; Julien Borghetti; Gilberto Medeiros Ribeiro
- Web page: https://patentgrep.com/patent/US8274813B2

## CPC

- H03B 7/06: active element being semiconductor device
- H10N 70/24: {based on migration or redistribution of ionic species, e.g. anions, vacancies}
- H10N 80/00: Bulk negative-resistance effect devices (integrated devices or assemblies of multiple devices H10N89/00)
- H03B: GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS (generators adapted for electrophonic musical instruments G10H; masers or lasers H01S; generation of oscillations in plasma H05H)
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

A memristive Negative Differential Resistance (NDR) device includes a first electrode adjacent to a memristive matrix, the memristive matrix including an intrinsic semiconducting region and a highly doped secondary region, a Metal-Insulator-Transition (MIT) material in series with the memristive matrix, and a second electrode adjacent to the MIT material.

## Claims

### Claim 1

A circuit comprising a memristive Negative Differential Resistance (NDR) device comprising:
a first electrode adjacent to a memristive matrix, said memristive matrix comprising an intrinsic semiconducting region and a highly doped secondary region;
a Metal-Insulator-Transition (MIT) material in series with said memristive matrix; and
a second electrode adjacent to said MIT material.

### Claim 2 (depends on 1)

The circuit of claim 1, in which said MIT material comprises at least one of: a vanadium oxide material, a niobium oxide material, an iron oxide material, a manganese oxide material, and a titanium oxide material.

### Claim 3 (depends on 1)

The circuit of claim 1, in which one of: said first electrode and said second electrode is connected to:
a capacitance in parallel with said memristive NDR device; and
a bias voltage supply to apply a bias voltage to said memristive NDR device such that an oscillating signal is produced.

### Claim 4 (depends on 3)

The circuit of claim 3, in which one of said first electrode and said second electrode is connected to a programming voltage supply to change a resistive state of said memristive NDR device by applying a programming voltage to move an interface between said semiconducting region and said highly doped semiconducting region.

### Claim 5 (depends on 4)

The circuit of claim 4, in which a programming voltage from said programming voltage supply changes said resistive state to cause said signal to stop oscillating.

### Claim 6 (depends on 4)

The circuit of claim 4, in which a programming voltage from said programming voltage supply changes said resistive state to cause said signal to start oscillating.

### Claim 7 (depends on 4)

The circuit of claim 4, in which a programming voltage from said programming voltage supply changes said resistive state to cause said oscillating signal to exhibit a target duty cycle.

### Claim 8 (depends on 4)

The circuit of claim 4, in which a programming voltage from said programming voltage supply changes said resistive state to cause said signal to exhibit a target oscillating frequency.

### Claim 9 (depends on 4)

The circuit of claim 4, in which a programming voltage from said programming voltage supply changes said resistive state to cause said signal to exhibit a target amplitude.

### Claim 10 (depends on 4)

The circuit of claim 4, in which said capacitance is one of: a parasitic capacitance and a capacitive device.

### Claim 11 (depends on 1)

The circuit of claim 1, further comprising, a programming voltage supply to change a resistive state of said memristive device.

### Claim 12 (depends on 11)

The circuit of claim 11, in which a programming voltage from said programming voltage supply changes said resistive state to cause said signal to stop oscillating.

### Claim 13 (depends on 11)

The circuit of claim 11, in which a programming voltage from said programming voltage supply changes said resistive state to cause said signal to start oscillating.

### Claim 14 (depends on 11)

The circuit of claim 11, in which a programming voltage from said programming voltage supply changes said resistive state to cause said oscillating signal to exhibit a target duty cycle.

### Claim 15 (depends on 11)

The circuit of claim 11, in which a programming voltage from said programming voltage supply changes said resistive state to cause said signal to exhibit a target oscillating frequency.

### Claim 16 (depends on 11)

The circuit of claim 11, in which a programming voltage from said programming voltage supply changes said resistive state to cause said signal to exhibit a target amplitude.