Method for driving pixel circuit, electro-optic device, and electronic apparatus

An electro-optic device comprising:

• a plurality of data lines;
• a plurality of scanning lines;
• a plurality of pixel circuits provided in correspondence with intersections of the plurality of data lines and the plurality of scanning lines, each of the plurality of pixel circuits including
• a driver transistor that generates a driving current on the basis of a potential of a gate of the driver transistor,
• an electro-optic element having a gradation obtained on the basis of the driving current generated by the driver transistor,
• a capacitive element having one terminal connected to the gate of the driver transistor,
• a first transistor which is provided between the gate of the driver transistor and a drain of the driver transistor, and a gate of which is supplied with a first control signal defining an initialization period,
• a second transistor which is provided between the drain of the driver transistor and a node used to supply an initialization potential, the initialization potential being a non-zero potential, and a gate of which is supplied with a second control signal defining the initialization period,
• a third transistor which is provided between the node and the other terminal of the capacitive element, and a gate of which is supplied with the first control signal, and
• a fourth transistor which is provided between the other terminal of the capacitive element and a corresponding one of the plurality of data lines, and a gate of which is supplied with a scanning signal defining a writing period via a corresponding one of the plurality of scanning lines;
• a first driving unit that supplies a data potential corresponding to a gradation to a corresponding one of the plurality of data lines;
• and
• a second driving unit that generates the first and second control signals and supplies the scanning signal to a corresponding one of the plurality of scanning lines,
• wherein the second driving unit sets a potential of the first control signal in the initialization period to a potential allowing the first and third transistors to be turned on, and sets a potential of the first control signal in the writing period to a potential allowing the first and third transistors to be turned off,
• wherein the second driving unit sets a potential of the second control signal in the initialization period to a predetermined potential allowing the second transistor to be operated in a saturation region thereof, and sets a potential of the second control signal in the writing period to a potential allowing the second transistor to be turned off, and
• wherein the second driving unit sets a potential of the scanning signal in the initialization period to a potential allowing the fourth transistor to be turned off, and sets a potential of the scanning signal in the writing period to a potential allowing the fourth transistor to be turned on.

An electro-optic device comprising:

• a plurality of data lines;
• a plurality of scanning lines;
• a plurality of pixel circuits provided in correspondence with intersections of the plurality of data lines and the plurality of scanning lines, each of the plurality of pixel circuit including
• a driver transistor that generates a driving current on the basis of a potential of a gate of the driver transistor,
• an electro-optic element having a gradation obtained on the basis of the driving current generated by the driver transistor,
• a capacitive element having one terminal connected to the gate of the driver transistor,
• a first transistor which is provided between the gate of the driver transistor and a drain of the driver transistor, and a gate of which is supplied with a first control signal defining an initialization period and a compensation period,
• a second transistor which is provided between the drain of the driver transistor and a node used to supply an initialization potential, the initialization potential being a non-zero potential, and a gate of which is supplied with a second control signal defining the initialization period,
• a third transistor which is provided between the node and the other terminal of the capacitive element, and a gate of which is supplied with the first control signal, and
• a fourth transistor which is provided between the other terminal of the capacitive element and a corresponding one of the plurality of data lines, and a gate of which is supplied with a scanning signal defining a writing period via a corresponding one of the plurality of scanning lines;
• a first driving unit that supplies a data potential corresponding to a gradation to a corresponding one of the plurality of data lines;
• and
• a second driving unit that generates the first and second control signals and supplies the scanning signal to a corresponding one of the plurality of scanning lines,
• wherein the second driving unit sets a potential of the first control signal in the initialization period and the compensation period to a potential allowing the first and third transistors to be turned on, and sets a potential of the first control signal in the writing period to a potential allowing the first and third transistors to be turned off,
• wherein the second driving unit sets a potential of the second control signal in initialization period to a predetermined potential allowing the second transistor to be operated in a saturation region thereof, and sets a potential of the second control signal in the compensation period and the writing period to a potential allowing the second transistor to be turned off, and
• wherein the second driving unit sets a potential of the scanning signal in the initialization period and the compensation period to a potential allowing the fourth transistor to be turned off, and sets a potential of the scanning signal in the writing period to a potential allowing the fourth transistor to be turned on.