Display driving device and method and liquid crystal display apparatus having the same

A display driving device, comprising:

• a signal controller that generates first and second groups of control signals and receives input image signals to generate image data;
• data drivers that are supplied with the image data and output data voltages corresponding to the image data;
• a first group of gate driver including first shift registers, each of which is supplied with the first group of control signals and outputs a first gate-on signal;
• and
• a second group of gate driver including second shift registers, each of which is supplied with the second group of control signals and outputs a second gate-on signal,
• wherein the first and second groups of control signals each includes a vertical synchronization start signal and at least one clock, the first group of control signals being each overlapped with corresponding one of the second group of control signals for a predetermined time interval.

A method of driving a liquid crystal display device, the method comprising:

• providing a first control signal and at least one first clock signal to a first gate driver providing first gate-on signals to a first group of gate lines;
• providing a second control signal and at least one second clock signal to a second gate driver providing second gate-on signals to a second group of gate lines about a half horizontal period after providing the first control signal and the at least one first clock signals to the first gate driver;
• providing the first gate-on signals to a first group of switching elements connected to data lines;
• providing the second gate-on signals to a second group of switching elements connected to the date lines about a half horizontal period after providing the first gate-on signals to a first group of switching elements;
• and
• providing the data voltages to the first and second group of switching elements,
• wherein the first control signal include a first vertical synchronization start signal, and the second control signal include a second vertical synchronization start signal which is overlapped with the first vertical synchronization start signal during a predetermined time interval.