Analog-digital converter with pipeline architecture associated with a programmable gain amplifier

A device comprising:

• an analog-digital converter for an analog input signal and with a pipeline architecture comprising a sequence of stages, an initial first stage of said sequence comprising
• a programmable gain amplifier comprising an amplifier, and a first switched capacitive circuit for coupling said amplifier in feedback, said first switched capacitive circuit comprising a first capacitive block, and a second capacitive block of programmable capacitance coupled thereto,
• an analog-to-digital conversion circuit with a programmable range threshold and being coupled to said programmable gain amplifier and comprising a programmable range threshold controller configured to define a plurality of range thresholds corresponding to a plurality of gains of said amplifier, said analog-to-digital conversion circuit configured to convert the analog input signal,
• a digital-to-analog conversion circuit being coupled to an output of said analog-to-digital conversion circuit, and
• a sample-and-hold circuit coupled between said programmable gain amplifier and said analog-to-digital conversion circuit, and configured to sample-and-hold the analog input signal;
• and
• a controller configured to deliver control signals to the initial first stage for a gain value and a corresponding range threshold value.

A method of operating a device comprising an analog-digital converter for an analog input signal and with a pipeline architecture comprising a sequence of stages, e an initial first stage of the sequence comprising a programmable gain amplifier, an analog-to-digital conversion circuit with a programmable range threshold and being coupled to the programmable gain amplifier, the analog-to-digital conversion circuit converting the analog input signal, a digital-to-analog conversion circuit being coupled to an output of the analog-to-digital conversion circuit, and a sample-and-hold circuit coupled between the programmable gain amplifier and the analog-to-digital conversion circuit and sample-and-holding the analog input signal, the method comprising:

• processing an analog signal with the device;
• operating each stage at a speed of a clock signal;
• and
• within each period of the clock signal, carrying out amplification and quantization of the analog signal in the initial first stage.

A method of making a device comprising:

• providing an analog-digital converter for an analog input signal and with a pipeline architecture comprising a sequence of stages;
• and
• forming an initial first stage of the analog-digital converter to comprise
• a programmable gain amplifier,
• an analog-to-digital conversion circuit with a programmable range threshold and being coupled to the programmable gain amplifier, the analog-to-digital conversion circuit converting the analog input signal,
• a digital-to-analog conversion circuit being coupled to an output of the analog-to-digital conversion circuit, and
• a sample-and-hold circuit coupled between the programmable gain amplifier and the analog-to-digital conversion circuit, and sample-and-holding the analog input signal.